LTC3226
10
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OPERATION
CAPGOOD Status Output
The LTC3226 charge pump includes a comparator to re-
port the status of the supercapacitors via an open-drain
NMOS transistor on the CAPGOOD pin. This pin is pulled
to ground until the CPO pin voltage rises to within 7.5%
of the programmed value. Once the CPO pin is above this
threshold, the CAPGOOD pin goes high impedance.
PROG Pin Short-Circuit Protection
Typically the maximum current that the LTC3226 charge
pump can deliver is set by the PROG resistor. However, if
for any reason, the PROG pin gets shorted to GND, or the
user chooses a PROG resistor value which is far smaller
than recommended, the charge pump input current is
limited to an internally set value of approximately 600mA.
Also the maximum current that can be sourced from the
PROG pin is limited by an internal resistor to less than 1mA.
LOW DROPOUT REGULATOR (LDO)
Another principal circuit component of the LTC3226 is the
low dropout regulator (LDO) which transfers power from
the supercapacitor stack to V
OUT
through a pass element
with an R
DS(ON)
of approximately 200m. This LDO has
a current limit internally set to 4A. In the event that the
input supply voltage falls below the PFI threshold, the PFI
comparator promptly turns on the LDO to supply the nec-
essary load without letting the V
OUT
rail droop too much.
However, to prevent unrestricted current flow from the
input to the supercapacitors through the ideal diode, the
LDO is turned off until the CPO voltage is greater than V
IN
by 100mV typical. The LDO output voltage is programmed
through an external resistor divider via the LDO_FB pin.
POWER-FAIL (PFI) COMPARATOR
The LTC3226 contains a fast comparator which switches
the part from normal to backup mode in the event the
input voltage, V
IN
, falls below an externally programmed
threshold voltage. In backup mode, the charge pump
shuts off and the LDO powers the load as long as there
is enough charge stored on the supercapacitors. The PFI
threshold voltage is programmed by an external resistor
divider via the PFI pin. The output of the PFI comparator
also drives the gate of an open-drain NMOS to report the
status via the PFO pin. In normal mode, the PFO pin is
high Impedance but in backup mode, the pin is pulled
down to ground.
IDEAL DIODE CONTROLLER
The LTC3226 contains an ideal diode controller which
controls the gate of an external PFET connected between
the input, V
IN
, and the output, V
OUT
, through the GATE
pin. Under normal operating conditions, this external FET
constitutes the main power path from input to output. For
very light loads, the controller maintains a 15mV delta
across the FET between the input and output voltage. In
the event V
IN
suddenly drops below V
OUT
, the controller
quickly turns the FET completely off to prevent any reverse
conduction from V
OUT
back to the input supply.
RESET COMPARATOR
The LTC3226 contains a RESET comparator which moni-
tors V
OUT
under all operating modes via the RST_FB pin
and reports the status via an open-drain NMOS transis-
tor on the RST pin. At any time, if V
OUT
falls 7.5% from
its programmed value, it pulls the RST pin low almost
instantaneously. However, on the rising edge the compara-
tor waits 290ms after V
OUT
crosses the threshold before
making the RST pin high impedance.
GLOBAL THERMAL SHUTDOWN
The LTC3226 includes a global thermal shutdown which
shuts down the entire part in the event the die temperature
exceeds 152°C. It resumes normal operation once the
temperature drops by about 15°C to approximately 137°C.
LTC3226
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APPLICATIONS INFORMATION
Programming the Supercapacitor
Termination Voltage (CPO)
The termination voltage of the supercapacitor stack on
the CPO pin can be programmed for any voltage between
2.5V to 5.3V by using a resistor divider from the CPO pin
to GND via the CPO_FB pin such that:
V
CPO
= V
CPO_FB
•1+
R
CP1
R
CP2
where V
CPO_FB
is 1.2V. See the block diagram in Figure1.
Typical values for R
CP1
and R
CP2
are in the range of 40k
to 5M.
Programming the Input Current Limit for the Charger
The input current limit for the LTC3226 charge pump is
programmed by using a single resistor from the PROG
pin to ground. The input current limit is typically 10,500
times the current out of the PROG pin. The PROG pin
voltage always servos to 1V as long as the part is not in
sleep mode. The program resistor and the input current
limit are calculated using the following equations:
R
PROG
=10,500
1V
I
VIN(ILIM)
, I
VIN(ILIM)
=10,500
1V
R
PROG
where I
VIN(ILIM)
is the input current limit for the charge
pump charger. The maximum allowable input current limit
of 315mA can be achieved by using a PROG resistor of
33.2k. To maximize the charge transfer rate, the charge
pump operates in 1x mode when the supercapacitor voltage
is less than the input voltage and the charge current out of
CPO pin is only limited by the programmed input current
limit. However, in 2x mode, the average charge current is
approximately half the input current limit.
Programming the Input Voltage Threshold for the
Power-Fail Comparator
The input voltage threshold below which the power-fail
status pin PFO indicates a power-fail condition and the
LTC3226 switches the internal LDO on can be programmed
by using a resistor divider from the V
IN
pin to GND via the
PFI pin such that:
V
IN(PFO _HI_ LO)
= V
PFI
•1+
R
PF1
R
PF2
where V
PFI
is 1.2V. See Figure 1. Typical values for R
PF1
and R
PF2
are in the range of 40k to 5M. For a smooth
transition from normal to back-up mode, the PFI threshold
should be set 50mV to 100mV above the programmed
LDO output voltage, V
OUT
.
The input voltage above which the power-fail status pin
PFO is high impedance and the supercapacitor charger
and the ideal diode are enabled is:
V
IN(PFO _LO _ HI)
= V
PFI
+ V
PFI(HYS)
()
•1+
R
PF1
R
PF2
where V
PFI(HYS)
is the hysteresis of the PFI comparator. It
is internally set to a typical value of 20mV.
The hysteresis can be increased externally by adding a
resistor, R
H
, in series with a diode, D1, between the PFO and
PFI pins as shown in Figure 2. This network will increase
the low-to-high V
IN
threshold for PFO while keeping the
high-to-low threshold intact. The increase in hysteresis
at the input can be calculated as shown:
ΔV
IN(HYS)
= V
PFI
+ V
PFI(HYS)
–V
F
()
R
PF1
R
H
LTC3226
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APPLICATIONS INFORMATION
where V
F
is the forward voltage of the diode. As an ex-
ample, if R
PF1
= 200k, R
PF2
= 120k, R
H
= 2M, and V
F
=
0.4V, the additional hysteresis provided by this network
can be calculated using the above equation as follows:
ΔV
IN(HYS)
= 1.2+0.02 0.4
()
V•
200kΩ
2MΩ
= 82mV
GND is needed to set V
OUT
and the reset threshold 7.5%
below the V
OUT
programmed voltage. However, the reset
threshold can be set independent of V
OUT
by an additional
resistor divider.
Effective Open-Loop Output Resistance (R
OL
) of the
Charge Pump
The effective open-loop output resistance (R
OL
) of a charge
pump determines the strength of a charge pump. The value
of this parameter depends on many factors such as the
oscillator frequency (f
OSC
), value of the flying capacitor
(C
FLY
), the nonoverlap time, the internal switch resistances
(R
S
), and the ESR of the external capacitors. A first order
approximation of R
OL
is given below:
R
OL
2 Σ
S=1to 4
R
S
+
1
f
OSC
•C
FLY
For the LTC3226 charge pump, the sum of the switch
resistances is approximately 2.5 in a typical applica-
tion where V
IN
= 3.3V and V
CPO
= 5V. For C
FLY
= 1µF and
f
OSC
= 1MHz, the effective open-loop output resistance
of the charge pump can be approximated from the above
equation as follows:
R
OL
2 2.5Ω+
1
1M Hz 1µ F
= 6Ω
Maximum Available Charge Current
In the absence of any internal current limit, the maximum
available current out of a charge pump in 2x mode can be
calculated from the charge pump input and output voltage
and the effective open-loop output resistance R
OL
using
the following equation:
I
CHRG
=
2V
IN
–V
CPO
R
OL
For example, if the LTC3226 charge pump (R
OL
6)
has to charge a supercapacitor to 5V from 2.5V input,
the charge current available when V
CPO
= 4.8V can be
calculated as follows:
I
CHRG
=
2 2.5V 4.8V
6Ω
= 33.3mA
3226 F02
LTC3226
D1
V
IN
V
OUT
PFO
PFI
470k
R
PF1
R
H
R
PF2
Figure 2. Increasing PFI Comparator Hysteresis Externally
Programming the LDO Output Voltage (V
OUT
)
The LDO output voltage in backup mode can be pro-
grammed for any voltage between 2.5V to 5.3V by using a
resistor divider from the V
OUT
pin to GND via the LDO_FB
pin such that:
V
OUT
= V
LDO_FB
•1+
R
FB1
R
FB2
where V
LDO_FB
is 0.8V. See the Block Diagram in Figure 1.
Typical values for R
FB1
and R
FB2
are in the range of 40k to
500k. Too small a resistor will result in a large quiescent
current whereas too large a resistor coupled with LDO_FB
pin capacitance will create an additional pole and may
cause loop instability.
Programming the Reset Threshold
The threshold for the reset comparator can be programmed
by using a resistor divider from the V
OUT
pin to GND via
the RST_FB pin such that:
V
OUT
= V
RST _ FB
•1+
R
FB1
R
FB2
where V
RST_FB
is 0.74V. See Figure 1. Typical values for
R
FB1
and R
FB3
are in the range of 40k to 5M. In most ap-
plications, the LDO_FB and RST_FB pins can be shorted
together and only one resistor divider between V
OUT
and

LTC3226IUD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Power Management Specialized - PMIC 2-Cell Supercapacitor Charger with Backup PowerPath controller
Lifecycle:
New from this manufacturer.
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