AD5301/AD5311/AD5321 Data Sheet
Rev. C | Page 18 of 24
APPLICATIONS NOTES
USING THE REF193/REF195 AS A POWER SUPPLY
Because the supply current required by the AD5301/AD5311/
AD5321 is extremely low, the user has an alternative option to
employ a REF195 voltage reference (for 5 V) or a REF193 voltage
reference (for 3 V) to supply the required voltage to the device
(see Figure 36).
SDA
SCL
5V
150µ
A TY
P
REF195
2-WIRE
SERIAL
INTERFACE
V
DD
AD5301/
AD53
1
1/
AD5321
V
OUT
= 0V TO 5V
00927-034
Figure 36. REF195 as Power Supply to AD5301/AD5311/AD5321
This is especially useful if the power supply is quite noisy or if
the system supply voltages are at some value other than 5 V or
3 V (for example, 15 V). The REF193/REF195 output a steady
supply voltage for the AD5301/AD5311/AD5321. If the low
dropout REF195 is used, it needs to supply a current of 150 μA
to the AD5301/AD5311/AD5321. This is with no load on the
output of the DAC. When the DAC output is loaded, the REF195
also needs to supply the current to the load.
The total current required (with a 2 kΩ load on the DAC output
and full scale loaded to the DAC) is
150 μA + (5 V/2 kΩ) = 2.65 mA
The load regulation of the REF195 is typically 2 ppm/mA,
which results in an error of 5.3 ppm (26.5 μV) for the 2.65 mA
current drawn from it. This corresponds to a 0.00136 LSB error.
BIPOLAR OPERATION USING THE AD5301/
AD5311/AD5321
The AD5301/AD5311/AD5321 has been designed for single-
supply operation, but a bipolar output range is also possible
using the circuit in Figure 37. The circuit below gives an output
voltage range of ±5 V. R a i l -to-rail operation at the amplifier
output is achievable using an AD820 or an OP295 as the output
amplifier.
AD5301/
AD53
11/
AD5321
2-WIRE SERIAL
INTERFACE
V
OUT
V
DD
10µF 0.1µF
+5V
+5V
–5V
R2
10kΩ
AD820/
OP295
R1
10kΩ
±5V
00927-035
Figure 37. Bipolar Operation with the AD5301/AD5311/AD5321
The output voltage for any input code can be calculated as
V
OUT
= ((V
DD
× (D/2
N
) × R1 + R2)/R1) − V
DD
× (R2/R1))
where:
D is the decimal equivalent of the code loaded to the DAC.
N is the DAC resolution.
With V
DD
= 5 V, R1 = R2 = 10 kΩ,
V
OUT
= (10 × D/2
N
) − 5 V
MULTIPLE DEVICES ON ONE BUS
Figure 38 shows four AD5301 devices on the same serial bus.
Each has a different slave address since the state of their A0
and A1 pins is different. This allows each DAC to be written to
or read from independently. The master device output bus line
drivers are open-drain, pull-downs in a fully I
2
C-compatible
interface.
CMOS DRIVEN SCL AND SDA LINES
For single or multisupply systems where the minimum SCL
swing requirements allow it, a CMOS SCL driver may be used,
and the SCL pull-up resistor can be removed, making the SCL
bus line fully CMOS compatible. This reduces power consump-
tion in both the SCL driver and receiver devices. The SDA line
remains open-drain, I
2
C compatible.
Further changes, in the SDA line driver, may be made to make
the system more CMOS compatible and save more power. As
the SDA line is bidirectional, it cannot be made fully CMOS
compatible. A switched pull-up resistor can be combined with
a CMOS device with an open-circuit (three-state) input such
that the CMOS SDA driver is enabled during write cycles and
I
2
C mode is enabled during shared cycles, that is, readback,
acknowledge bit cycles, start conditions, and stop conditions.
