ADP1712/ADP1713/ADP1714
Rev. A | Page 4 of 16
Parameter Symbol Conditions Min Typ Max Unit
EN INPUT LOGIC HIGH V
IH
2.5 V ≤ V
IN
≤ 5.5 V 1.8 V
EN INPUT LOGIC LOW V
IL
2.5 V ≤ V
IN
≤ 5.5 V 0.4 V
EN INPUT LEAKAGE CURRENT V
I-LEAKAGE
EN = IN or GND 0.1 1 μA
ADJ INPUT BIAS CURRENT
(ADP1712 ADJUSTABLE)
ADJ
I-BIAS
30 100 nA
OUTPUT NOISE OUT
NOISE
ADP1713
10 Hz to 100 kHz, V
IN
= 5.0 V, V
OUT
= 0.75 V,
with 10 nF bypass capacitor
40 μV rms
ADP1712 and ADP1714 10 Hz to 100 kHz, V
IN
= 5.0 V, V
OUT
= 3.3 V 380 μV rms
POWER SUPPLY REJECTION RATIO PSRR
ADP1713
1 kHz, V
IN
= 5.0 V, V
OUT
= 0.75 V, with 10 nF
bypass capacitor
72 dB
ADP1712 and ADP1714 1 kHz, V
IN
= 5.0 V, V
OUT
= 3.3 V 65 dB
1
Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances
of resistors used.
2
Based on an end-point calculation using 10 mA and 300 mA loads. See for typical load regulation performance for loads less than 10 mA. Figure 10
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.5 V.
4
Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value.
5
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
