Absolute maximum ratings L9777
10/25 DocID13496 Rev 4
Timing
VI + 0.3 (Opt. A)
40V (Opt. B)
Not connected (Opt. C)
V
TIMING
Voltage -0.3 - V
I
TIMING
Current Internal limited
VDD
V
VDD
Voltage -0.3
VI + 0.3 (Opt. A)
40V (Opt. B)
40V (Opt. C)
V
I
VDD
Current Internal limited
Temperature
T
J
Junction temperature -40 150 °C
ESD voltage level
V
ESD
HBM-MIL STD 883C -1.5 1.5 kV
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Min. Max. Unit
DocID13496 Rev 4 11/25
L9777 Functional description
24
3 Functional description
3.1 Voltage regulator
This device supply an always active 5 V regulated voltage on pin V
CC
with a current
capability up to 200 mA. V
CC
voltage has an accuracy of 2% over a wide supply voltage
(V
I
= 5.6 V to 31 V) and temperature range (T
J
= -40 °C to 150 °C).
A short circuit protection to GND is provided (see Figure 6).
By means of tracking regulator, it is available a second output regulated voltage on pin VDD
with a current capability up to 50 mA. This regulated output is switchable on/off by external
pin VDD_EN.
Figure 6. VCC versus output current IVCC
3.2 Reset
The reset circuit monitors the output voltage VCC. In case of internal reset threshold, if the
output voltage stays lower than VCCUN for a filter time TRR, then NMI goes low.
This filter time depends on the distance between the VCC output and the under voltage
reset threshold (VCCUN): this solution increases the noise immunity of the voltage regulator
be-cause the filter time between the reset event and the falling of NMI output changes
according to the depth of spike on output voltage (see following picture).
A minimum filter time of 1 μs (TRR1) is guaranteed if VCC goes down to 2.5 V and
V
S
> 5.6 V.
Figure 7. Filter time between VCC and NMI
Otherwise, in case of external reset threshold fixed by means of external resistor divider on
pin RADJ, there is only a constant filter time (TRRADJ) of 1 μs min value.
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Functional description L9777
12/25 DocID13496 Rev 4
In both cases, if the output voltage VCC becomes lower than 2.0V (typ) than NMI may go
immediately low without any delay. The NMI low signal is guaranteed for an output voltage
VCC greater than 1V.
When VCC returns over VCCUN threshold NMI goes high with a filter time TRD. This time is
obtained by 127 period of an oscillator with an additional initial time. The oscillator period is
given by:
TOSC
VDU VDRLCD
IRC
-----------------------------------------------------------
VDU VDRLCD
IRD
-----------------------------------------------------------+=
where:
ICR = 20 μA (typ) is a current internally generated,
IDR = 20 μA (typ) is a current internally generated,
VDU = 1.24 V and VDRL = 0.62 V are two typical internal thresholds,
CD is the external capacitance on pin D.
TRD is given by:
TRD (s) = T0 + 127 x TOSC = 0.62*10-3 + 7.874* 106 * CD (typ)
Where T0 is the initial ramp between 0 V and VDU as in Figure 8.
Figure 8. Reset time diagram
If NMI output goes to 0 V for filter time TRESDF (which is fixed by external cap on TIMING
pin) also the RESET signal goes to 0 V. RESET low signal is guaranteed for VCC > 1 V.
Figure 9. Filter time between NMI and RESET
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L9777C

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
LDO Voltage Regulators Low-Power Voltage Regulator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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