NCV7344
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4
FUNCTIONAL DESCRIPTION
Operating Modes
NCV7344 provides two modes of operation as illustrated
in Table 2. These modes are selectable through pin STB.
Table 2. OPERATING MODES
Pin STB Mode Pin RxD
Low Normal Low when bus
dominant
High when bus
recessive
High Standby Follows the bus
when wake−up
detected
High when no
wake−up
request detected
Normal Mode
In the normal mode, the transceiver is able to
communicate via the bus lines. The signals are transmitted
and received to the CAN controller via the pins TxD and
RxD. The slopes on the bus lines outputs are optimized to
give low EME.
Standby Mode
In standby mode both the transmitter and receiver are
disabled and a very low−power differential receiver
monitors the bus lines for CAN bus activity. The bus lines
are biased to ground and supply current is reduced to a
minimum, typically 10 mA. When a wake−up request is
detected by the low−power differential receiver, the signal
is first filtered and then verified as a valid wake signal after
a time period of t
wake_filt
, the RxD pin is driven low by the
transceiver (following the bus) to inform the controller of
the wake−up request.
Wake−up
When a valid wake−up pattern (phase in order
dominant – recessive – dominant) is detected during the
standby mode the RxD pin follows the bus. Minimum length
of each phase is t
wake_filt
– see Figure 5.
Pattern must be received within t
wake_to
to be recognized
as valid wake−up otherwise internal logic is reset.
CANH
CANL
RxD
t
wake_filt
t
wake_filt
<t
wake_to
t
wake_filt
Figure 5. NCV7344 Wake−up Behavior
t
dwakerd
t
dwakedr
Overtemperature Detection
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 180°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC is reduced. All other
IC functions continue to operate. The transmitter off−state
resets when the temperature decreases below the shutdown
threshold and pin TxD goes high. The thermal protection
circuit is particularly needed when a bus line short circuits.
TxD Dominant Timeout Function
A TxD dominant timeout timer circuit prevents the bus
lines being driven to a permanent dominant state (blocking
all network communication) if pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the low−level on pin TxD exceeds the
internal timer value t
dom(TxD)
, the transmitter is disabled,
driving the bus into a recessive state. The timer is reset by a
positive edge on pin TxD.
This TxD dominant timeout time t
dom(TxD)
defines
the minimum possible bit rate to 17 kbps.
Fail Safe Features
A current−limiting circuit protects the transmitter output
stage from damage caused by accidental short circuit
to either positive or negative supply voltage, although
power dissipation increases during this fault condition.
Standby undervoltage on VCC pin prevents the chip
sending data on the bus when there is not enough VCC
supply voltage by entering standby mode. Undervoltage
detection on VIO pin (NCV7344−3 version only) also
causes transition to standby mode. Switch−off undervoltage
detection level on supply pin(s) forces transceiver to
disengage from the bus until the supply is recovered. After
supply is recovered TxD pin must be first released to high to
allow sending dominant bits again. Recovery time from
undervoltage detection is equal to td(stb−nm) time.
The pins CANH and CANL are protected from
automotive electrical transients (according to ISO 7637; see
Figure 7). Pins TxD and STB are pulled high internally
should the input become disconnected. Pins TxD, STB and
RxD will be floating, preventing reverse supply should the
VCC supply be removed.
V
IO
Supply Pin
The V
IO
pin (available only on NCV7344−3 version)
should be connected to microcontroller supply pin. By using
V
IO
supply pin shared with microcontroller the I/O levels
between microcontroller and transceiver are properly
adjusted. See Figure 4. Pin V
IO
also provides the internal
supply voltage for low−power differential receiver of the
transceiver. This allows detection of wake−up request even
when there is no supply voltage on pin V
CC
.
