6
FN6192.1
June 28, 2006
Figure 12A illustrates the AC test circuit used to operate the
video amplifier into a 150Ω load while providing a 50Ω
matched impedance. Figure 12B illustrates the test circuit for
impedance matching to 75Ω test equipment.
Application Information
General
The ISL4089 implements the video DC-restore function
using a high performance gain adjustable video amplifier
and a nulling, sample-hold amplifier to establish a user
defined DC reference voltage at the video amplifier output. A
detailed description of the DC-restore function implemented
in the ISL4089 can be found in application note AN1089,
EL4089 and EL4390 DC-Restored Video Amplifier. The
ISL4089 performs the same function with the exception that
it is designed for single supply operation.
Video Amplifier Operation (Figure 13)
The ISL4089 video amplifier (A1) is voltage-feed, high
performance video amplifier designed for +5V operation.
The output stage is capable of swinging to within 10mV of
the negative rail. The differential input stage contains an
internal voltage reference that positions the non-inverting
input DC level (V1) to ~1.2V higher than the negative supply
rail. This offset ensures that the amplifier input DC level is
maintained within the common mode input voltage range.
The amplifier non-inverting gain is given in Equation 1.
DC-Restore Amplifier (Figure 13)
The DC-restore circuit contains a voltage reference amplifier
and an analog switch function that closes the DC-restore
loop under control of the HOLD logic input. The reference
amplifier uses an internal 10mV offset voltage (V2) to enable
the V
REF
input to sense down to the negative supply. The A2
amplifier output stage operates in a current-feed mode with a
source/sink capability of ±300µA (Typ).
A logic “0” at the HOLD input closes switch S1 which closes
the DC-restore loop. The video input AC coupling capacitor,
CX1, acts as a DC hold capacitor (through the 75Ω
termination resistor RX1) to average the current-source
output of amplifier A2. When the DC-restore loop has
reached equilibrium, the DC voltage stored on CX1 will the
value required to force the output voltages at A1 (V
OUT
) and
A2 (V
IN+
) according to the following:
and; the DC voltage at the non-inverting input of the video
amplifier A1 is given in Equation 3:
Therefore, if V
REF
is set to 0V (GND); V
OUT
= 10mV, and
the DC voltage stored on CX1 is ~1.2V.
The CX1 capacitor value is chosen from the system
requirements. A typical DC-restore application using the
horizontal sync to drive the HOLD pin will result in a 62µs
hold time. The typical input bias current to the video amplifier
is 1.2µA, so for a 62µs hold time, and a 0.01µF capacitor, the
output voltage drift is 7.5mV in one line. The restore amplifier
can provide a typical current of 300µA to charge capacitor
CX1, so with a 1.2µs sampling time, the output can be
corrected by 36mV in each line.
Using a smaller value of CX1 increases both the voltage that
can be corrected, as well as the droop while being held.
Likewise, using a larger value of CX1, reduces the correction
and droop voltages. A sample of charging and droop rates
are shown on the following table.
AC Test Circuits
FIGURE 12A. VIDEO AMPLIFIER AC TEST CIRCUIT FOR 50Ω
FIGURE 12B. BACKTERMINATED TEST CIRCUIT FOR VIDEO
CABLE APPLICATION.
R
S
C
L
V
IN
TEST
86.6Ω
50Ω
118Ω
R
G
R
F
EQUIPMENT
50Ω
+
-
1. HOLD INPUT = 1
R
S
C
L
V
IN
TEST
75Ω
75Ω
R
G
R
F
EQUIPMENT
75Ω
+
-
1. HOLD INPUT = 1
V
OUT
V
IN+
1.2V–()1
R
F
R
G
--------+
⎝⎠
⎜⎟
⎛⎞
•=
(EQ. 1)
TABLE OF CHARGE STORAGE CAPACITOR VS DROOP
CHARGING RATES (NOTE)
CAP VALUE
(if)
DROOP IN
62µs
(mV)
CHARGE IN
1.2µs
(mV)
CHARGE IN
4µs
(mV)
10 7.5 36 120
33 2.3 11 36
100 0.75 3.6 12
NOTE: Basic formulae are: V (droop) = Ib+ * (Line time - Sample
time)/Capacitor and V (charge) = I
OUT
* Sample time/Capacitor
V
OUT
(DC) V
REF
10mV+=
(EQ. 2)
V
IN+
V
OUT
(DC) 1.2V+=
(EQ. 3)
ISL4089
