TJA1048 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 6 — 19 March 2018 6 of 27
NXP Semiconductors
TJA1048
Dual high-speed CAN transceiver with Standby mode
7. Functional description
The TJA1048 is a dual HS-CAN stand-alone transceiver with Standby mode and robust
ESD handling capability. It combines the functionality of two TJA1042/3 transceivers with
improved EMC and quiescent current performance. Improved slope control and high DC
handling capability on the bus pins provide additional application flexibility.
7.1 Operating modes
The TJA1048 supports two operating modes per transceiver, Normal and Standby. The
operating mode can be selected independently for each transceiver via pins STBN1 and
STBN2 (see Table 4
).
7.1.1 Normal mode
A HIGH level on pin STBN1/STBN2 selects Normal mode. In this mode, the transceiver
can transmit and receive data via the bus lines CANH1/CANL1 and CANH2/CANL2 (see
Figure 1
for the block diagram). The differential receiver converts the analog data on the
bus lines into digital data which is output on pin RXD1/RXD2. The slopes of the output
signals on the bus lines are controlled internally and are optimized in a way that
guarantees the lowest possible EME.
7.1.2 Standby mode
A LOW level on pin STBN1/STBN2 selects Standby mode. In Standby mode, the
transceiver is not able to transmit or correctly receive data via the bus lines. The
transmitter and Normal-mode receiver blocks are switched off to reduce supply current,
and only a low-power differential receiver monitors the bus lines for activity.
In Standby mode, the bus lines are biased to ground to minimize the system supply
current. The low-power receiver is supplied by V
IO
, and is capable of detecting CAN bus
activity even if V
IO
is the only supply voltage available. When pin RXD1/RXD2 goes LOW
to signal a wake-up request, a transition to Normal mode will not be triggered until
STBN1/STBN2 is forced HIGH.
7.1.3 Remote wake-up (via the CAN bus)
A dedicated wake-up sequence (specified in ISO 11898-2:2016) must be received to
wake-up the TJA1048 from a low-power mode. This filtering is necessary to avoid
spurious wake-up events due to a dominant clamped CAN bus or dominant phases
caused by noise or spikes on the bus.
A valid wake-up pattern consists of:
• A dominant phase of at least t
wake(busdom)
followed by
• A recessive phase of at least t
wake(busrec)
followed by
• A dominant phase of at least t
wake(busdom)
Table 4. Operating modes
Mode Pin STBN1/STBN2 Pin RXD1/RXD2
LOW HIGH
Normal HIGH bus dominant bus recessive
Standby LOW wake-up request detected no wake-up request detected
