ADP5070RE-EVALZ/ADP5071RE-EVALZ User Guide UG-848
Rev. 0 | Page 7 of 13
LOAD REGULATION
For load regulation measurements, monitor the regulator output
while the load is varied. For good load regulation, the output
must change as little as possible with varying loads. The input
voltage must be held constant during this measurement. Figure 7
and Figure 8 show the typical load regulation performance of the
ADP5070/ADP5071 at both the output and feedback pins. Keep
power leads short during this test and use a power supply with
remote sense.
Figure 7. Boost Regulator Load Regulation, V
IN
= 5 V, V
POS
= 15 V (Nominal
Defined as Average Value Within a Range of 65% to 75% Maximum Load)
Figure 8. Inverting Regulator Load Regulation, V
IN
= 5 V, V
NEG
= −15 V (Nominal
Defined as Average Value Within a Range of 65% to 75% Maximum Load)
EFFICIENCY
For efficiency measurements, monitor the regulator input and
output while the load is varied. The input voltage must be held
constant during this measurement. Keep power leads short during
this test and use a power supply with remote sense. Connect
ammeters in series with the input and output. Connect voltmeters
to the PCB side of the ammeter and measure the voltage across the
input and output terminals. For the best results, measure the
voltage across the input and output capacitors. If possible, par-
ticularly at low current, trigger the meters simultaneously and set
to average readings for a period of a few hundred milliseconds or
more. Averaging the readings removes the switching ripple and
skip mode effects. Figure 9 and Figure 10 show typical efficiency
curves using a 5 V input.
Figure 9. Boost Regulator Efficiency vs. Current Load, V
POS
= 15 V, T
A
= 25°C
Figure 10. Inverting Regulator Efficiency vs. Current Load, V
NEG
= −15 V, T
A
= 25°C
–0.5
–0.3
–0.1
0.1
0.3
0.5
0 0.05 0.10 0.15 0.20 0.25
LOAD REGULATION (% CHANGE IN V
FB1
)
LOAD (A)
13281-007
1.2MHz
2.4MHz
–0.5
–0.3
–0.1
0
0.3
0.5
0 0.05 0.10
LOAD (A)
1.2MHz
2.4MHz
LOAD REGULATION (% VARIATION IN V
REF
TO V
FB2
)
13281-008
0
20
40
60
80
100
0.001 0.01
0.1
1
EFFICIENCY (%)
LOAD (A)
V
IN
= 5V, 1.2MHz
V
IN
= 5V, 2.4MHz
13281-009
0
20
40
60
80
100
0.001 0.01 0.1 1
EFFICIENCY (%)
V
IN
= 5V, 1.2MHz
V
IN
= 5V, 2.4MHz
LOAD (A)
13281-010
UG-848 ADP5070RE-EVALZ/ADP5071RE-EVALZ User Guide
Rev. 0 | Page 8 of 13
EVALUATION BOARD SCHEMATICS
Figure 11. Evaluation Board Schematic for the ADP5070/ADP5071
VNEG ENABLE
3
2
1
EN2
V_EN
EN2
MOLEX22-03-2031
SEQUENCE SELECT
3
2
1
SEQ
MOLEX22-03-2031
VREG
SEQ
GND
GND
VPOS ENABLE
3
2
1
EN1
V_EN
MOLEX22-03-2031
EN1
GND
A
C
CR1
2
1
V_EN
R7
R8
VIN
MMSZ5233B-7-F
69157-102
14.3K
V_EN
14.3K
GND
SOFT START TIME
2
1
SS
R11
69157-102
50K
SS
GND
SYNC SELECT
3
2
1
SYNC
VREG
SYNC
MOLEX22-03-2031
GND
SLEW RATE SELECT
3
2
1
SLEW
MOLEX22-03-2031
VREG
SLEW
GND
2
1
VIN
3
2
1
OUTPUT
COUT2B
COUT2
A C
D2
L2
COUT1B
COUT1
A C
D1
RFF2
CIN1
CVREG
CVREF
RFT2
CFF2
RFB2
CHF4
RC2
CC2
2
3
1
JP6
L1
16
14
4
20
2
10
6
5
18
19
17
1
PAD
3
13
7
11
9 12
8
15
U1
RFT1
RFB1
RFF1
CFF1
RC1
CC1
CHF3
2
3
1
JP5
COMP1
EN1
15UH
MC000044
MC000045
10UF
DNI
10UF
DNI
DFLS240-7
1UF
2.32MEG
118K
10K
0.068UF
ADP5070
2.43MEG
137K
12K
0.047UF
VNEG
VPOS
VREG
SW2
FB2
EN2
COMP2
SW1
SYNC
SLEW
SEQ
SS
FB1
INBK
VREF
1UF
10UF
PGND
6.8UH
10UF
VIN
DFLS240-7
10UF
PGND
AGND
PGND
B
COM
A
GND
B
COM
A
GND
PAD
SW1
PGND SW2
PVIN2
PVINSYS
PVIN1
VREG
AGND
VREF
FB2
COMP2
EN2SS
EN1
COMP1
FB1
SLEW
SEQ
SYNC
INBK
PGND
13281-011
ADP5070RE-EVALZ/ADP5071RE-EVALZ User Guide UG-848
Rev. 0 | Page 9 of 13
Figure 12. Evaluation Board Schematic for the Optional Negative Supply LDO Regulators
Figure 13. Evaluation Board Schematic for the Optional Positive Supply LDO Regulators
NEGATIVE SUPPLY LDO - 12V OUT
2
1
LDO_NEG
CNR4
RFT4
COUT4
CIN4
5
2
1
3
4
U3
1
LN_EN
2
1
J_LN_EN
2
1
LN_VIN
RNR4
RFB4
LN_VIN
VNEG
ADP7182AUJZ
2.2UF
2.2UF
69157-102
MC000044
0.1UF
52.3K
619
5.9K
GND
GND
VIN
EN
GND
ADJ
VOUT
GND
13281-013
POSITIVE SUPPLY LDO + 12V OUT
2
1
LDO_POS
CNR3
RFT3
RNR3
COUT3
CIN3
2
18
7
6 3
4
PAD
5
U2
CSS3
RFB3
1
LP_EN
21
J_LP_EN
2
1
LP_VIN
LP_VOUT
LP_EN
ADP7142
91K
2.2UF
2.2UF
LP_FB
LP_VIN
LP_SS
VPOS
MC000044
1K
10K
0
69157-102
0.1UF
1000PF
GND
EP
VIN
VIN
SS
EN GND
SENSE
VOUT
VOUT
GND
13281-012

ADP5070RE-EVALZ

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Power Management IC Development Tools Dual Switching Reg for Vpos & Vneg
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet