MC14174BDR2

Semiconductor Components Industries, LLC, 2000
August, 2000 – Rev. 4
1 Publication Order Number:
MC14174B/D
MC14174B
Hex Type D Flip-Flop
The MC14174B hex type D flip–flop is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. Data on the D inputs which meets the setup time
requirements is transferred to the Q outputs on the positive edge of the
clock pulse. All six flip–flops share common clock and reset inputs.
The reset is active low, and independent of the clock.
Static Operation
All Inputs and Outputs Buffered
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load over the Rated Temperature Range
Functional Equivalent to TTL 74174
MAXIMUM RATINGS (Voltages Referenced to V
SS
) (Note 2.)
Symbol Parameter Value Unit
V
DD
DC Supply Voltage Range –0.5 to +18.0 V
V
in
, V
out
Input or Output Voltage Range
(DC or Transient)
–0.5 to V
DD
+ 0.5 V
I
in
, I
out
Input or Output Current
(DC or Transient) per Pin
±10 mA
P
D
Power Dissipation,
per Package (Note 3.)
500 mW
T
A
Ambient Temperature Range –55 to +125 °C
T
stg
Storage Temperature Range –65 to +150 °C
T
L
Lead Temperature
(8–Second Soldering)
260 °C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/C From 65C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
) V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
http://onsemi.com
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
Device Package Shipping
ORDERING INFORMATION
MC14174BCP PDIP–16 2000/Box
MC14174BD SOIC–16 48/Rail
MC14174BDR2 SOIC–16 2500/Tape & Reel
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
MARKING
DIAGRAMS
1
16
PDIP–16
P SUFFIX
CASE 648
MC14174BCP
AWLYYWW
SOIC–16
D SUFFIX
CASE 751B
1
16
14174B
AWLYWW
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14174B
ALYW
MC14174BF SOEIAJ–16 See Note 1.
MC14174BFEL SOEIAJ–16 See Note 1.
MC14174B
http://onsemi.com
2
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
Q4
D4
D5
V
DD
C
Q3
D3
D1
D0
Q0
R
V
SS
Q2
D2
Q1
Q5
BLOCK DIAGRAM
9
1
3
4
6
11
13
14
2
7
10
15
CLOCK
RESET
D0
D1
D2
D3
D4
D5
V
DD
= PIN 16
V
SS
= PIN 8
Q2
Q3
Q4
5
Q1
12
Q0
Q5
TRUTH TABLE
(Positive Logic)
Inputs Output
Clock Data Reset
Q
010
111
X1Q
XX00
X = Don’t Care
No
Change
MC14174B
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
SS
)
V
DD
– 55C 25C 125C
Characteristic Symbol
V
DD
Vdc
Min Max Min Typ
(4.)
Max Min Max
Unit
Output Voltage “0” Level
V
in
= V
DD
or 0
V
OL
5.0
10
15
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
Vdc
“1” Level
V
in
= 0 or V
DD
V
OH
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
5.0
10
15
4.95
9.95
14.95
Vdc
Input Voltage “0” Level
(V
O
= 4.5 or 0.5 Vdc)
(V
O
= 9.0 or 1.0 Vdc)
(V
O
= 13.5 or 1.5 Vdc)
V
IL
5.0
10
15
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
Vdc
“1” Level
(V
O
= 0.5 or 4.5 Vdc)
(V
O
= 1.0 or 9.0 Vdc)
(V
O
= 1.5 or 13.5 Vdc)
V
IH
5.0
10
15
3.5
7.0
11
3.5
7.0
11
2.75
5.50
8.25
3.5
7.0
11
Vdc
Output Drive Current
(V
OH
= 2.5 Vdc) Source
(V
OH
= 4.6 Vdc)
(V
OH
= 9.5 Vdc)
(V
OH
= 13.5 Vdc)
I
OH
5.0
5.0
10
15
– 3.0
– 0.64
– 1.6
– 4.2
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
– 1.7
– 0.36
– 0.9
– 2.4
mAdc
(V
OL
= 0.4 Vdc) Sink
(V
OL
= 0.5 Vdc)
(V
OL
= 1.5 Vdc)
I
OL
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.88
2.25
8.8
0.36
0.9
2.4
mAdc
Input Current I
in
15 ± 0.1 ±0.00001 ± 0.1 ± 1.0 µAdc
Input Capacitance
(V
in
= 0)
C
in
5.0 7.5 pF
Quiescent Current
(Per Package)
I
DD
5.0
10
15
5.0
10
20
0.005
0.010
0.015
5.0
10
20
150
300
600
µAdc
Total Supply Current
(5.)
(6.)
(Dynamic plus Quiescent,
Per Package)
(C
L
= 50 pF on all outputs, all
buffers switching)
I
T
5.0
10
15
I
T
= (1.1 µA/kHz) f + I
DD
I
T
= (2.3 µA/kHz) f + I
DD
I
T
= (3.7 µA/kHz) f + I
DD
µAdc
4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
5. The formulas given are for the typical characteristics only at 25C.
6. To calculate total supply current at loads other than 50 pF:
I
T
(C
L
) = I
T
(50 pF) + (C
L
– 50) Vfk
where: I
T
is in µA (per package), C
L
in pF, V = (V
DD
– V
SS
) in volts, f in kHz is input frequency, and k = 0.003.

MC14174BDR2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Flip Flops 3-18V CMOS Hex
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet