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Figure 2 : SRC : I
coil
Failure and Time Dependence of Active Region.
Figure 3 : Permanent Conduction Protection.
H
J
: Input signal
I
C
: Coil current
V
CM
: Voltage on capacitor C
SRC.
D
ST
: Percentage of imposed desaturation time.
PERMANENT CONDUCTION PROTECTION
(fig. 3)
The permanent conduction protection circuit moni-
tors the input period, charging CP with a costant cur-
rent when the sensor signal is high and discharging
it when the sensor signal is low. If the input remains
high for a time longer than T
P
the voltage across C
P
reaches an internally fixed value forcing the slow de-
crease of coil current to zero. A slow decrease is
necessary to avoid undesired sparks. When the in-
put signal goes low again C
P
is swiftly discharged
and the current control loop operates normally.
The delay time T
P
is given by :
T
P
(sec) = 18 C
P
R
7
Where R
7
is the biasing resistor on pin 12 (in K) and
Cp the delay capacitor at pin 9 (in µF).
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OTHER APPLICATION NOTES
DUMP PROTECTION
Load dump protection must be implemented by an
external zener if this function is necessary. In fig. 4
DZ
2
protects the driver stage, the connection be-
tween pin 6 and 7 protects the output transistor of
pin 6. Moreover DZ
1
protects both the power supply
input (pin 3) and Hall-effect sensor.
Resistor R
4
is necessary to limit DZ
1
current during
load dump.
OVERVOLTAGE LIMITATION
The external darlington collector voltage is sensed
by the voltage divider R
2
, R
3
. The voltage limitation
increases rising R
2
or decreasing R
3
.
Due to the active circuit used, an R
o
C
o
series net-
work is mandatory for stability during the high vol-
tage condition.
R
o
C
o
values depend on the darlington used in the
application.
Moreover the resistor R
13
is suggested to limit the
overvoltage even when supply voltage is discon-
nected during the high voltage condition.
REVERSE BATTERY PROTECTION
Due to the presence of external impedance at pin 6,
3, 16, 15 L497 is protected against reverse battery
voltage.
NEGATIVE SPIKE PROTECTION
If correct operation is requested also during short
negative spikes, the diode D
S
and capacitor C
s
must
be used.
Figure 4 : Application Circuit.
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DIP16
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 0.77 1.65 0.030 0.065
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 17.78 0.700
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
Z 1.27 0.050
OUTLINE AND
MECHANICAL DATA
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L497D1

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
IC CTRLR HALL EFFECT IGN SOIC-16
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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