GS9078A Data Sheet
34165 - 4 March 2006 10 of 14
4.3 Output Return Loss Measurement
To perform a practical return loss measurement, it is necessary to force the
GS9078A output to a DC high or low condition. The actual measured return loss
will be based on the outputs being static at V
CC
or V
CC
-1.6V. Under normal
operating conditions the outputs of the device swing between V
CC
-0.4V and
V
CC
-1.2V, so the measured value of return loss will not represent the actual
operating return loss.
A simple method of calculating the values of actual operating return loss is to
interpolate the two return loss measurements. In this way, the values of return loss
are estimated at V
CC
-0.4V and V
CC
-1.2V based on the measurements at V
CC
and
V
CC
-1.6V.
The two values of return loss (high and low) will typically differ by several decibels.
If the measured return loss is R
H
for logic high and R
L
for logic low, then the two
values can be interpolated as follows:
R
IH
= R
H
- (R
H
-R
L
)/4 and
R
IL
= R
L
+(R
H
-R
L
)/4
where R
IH
is the interpolated logic high value and R
IL
is the interpolated logic low
value.
For example, if R
H
= -18dB and R
L
= -14dB, then the interpolated values are
R
IH
= -17dB and R
IL
= -15dB.
4.4 Output Amplitude (RSET)
The output amplitude of the GS9078A is set to 800mV
p-p
with a tolerance of ±7%
using an RSET resistor of 750Ω. A ±1% SMT resistor should be used.
The R
SET
resistor is part of the high speed output circuit of the GS9078A. The
resistor should be placed as close as possible to the R
SET
pin. In addition, the PCB
capacitance should be minimized at this node by removing the PCB groundplane
beneath the R
SET
resistor and the R
SET
pin.
NOTE: Only an R
SET
value of 750Ω ±1% should be used. Using other values for
R
SET
is not recommended.
GS9078A Data Sheet
34165 - 4 March 2006 11 of 14
5. Application Information
5.1 PCB Layout
Special attention must be paid to component layout when designing serial digital
interfaces for SDTV.
An FR-4 dielectric can be used, however, controlled impedance transmission lines
are required for PCB traces longer than approximately 1cm. Note the following
PCB artwork features used to optimize performance:
The PCB trace width for SD rate signals is closely matched to SMT
component width to minimize reflections due to changes in trace impedance.
The PCB groundplane is removed under the GS9078A output components to
minimize parasitic capacitance.
The PCB ground plane is removed under the GS9078A R
SET
pin and resistor
to minimize parasitic capacitance.
Input and output BNC connectors are surface mounted in-line to eliminate a
transmission line stub caused by a BNC mounting via high speed traces which
are curved to minimize impedance variations due to change of PCB trace
width.
5.2 Typical Application Circuit
Figure 5-1: Typical Application Circuit
GS9078A
1
2
3
4
12
11
9
SDI
SDI
VEE
RSET
SDO
SDO
VCC
10n
75
5.6n
4u7
BNC
VCC
75
5.6n
10n 75
4u7
49.9
750
10n
49.9
4u7
75
BNC
VCC
4u7
VCC
* TYPICAL VALUE: VARIES WITH LAYOUT
DIFFERENTIAL
DATA INPUT
*
*
NOTE: All resistors in Ohms, capacitors in Farads,
and inductors in Henrys, unless otherwise noted.
GS9078A Data Sheet
34165 - 4 March 2006 12 of 14
6. Package & Ordering Information
6.1 Package Dimensions
4.00+/-0.05
B
4.00+/-0.05
2X
2X
0.15
0.15
C
C
0.10
C
16X
0.08
C
SEATING PLANE
0.85+/-0.05
0.00-0.05
0.65/2
0.65
DETAIL B
SCALE:NTS
DATUM A OR B
TERMINAL TIP
0.20 REF
DATUM B
0.65
16X
0.35+/-0.05
0.10
0.05
C
A
B
C
DATUM A
2.76+/-0.10
0.40+/-0.05
2.76+/-0.10
DETAIL B
CENTER TAB
PIN 1 AREA
A
C

GS9078ACTE3

Mfr. #:
Manufacturer:
Semtech
Description:
Video ICs QFN-16 Pin Taped (250/reel)
Lifecycle:
New from this manufacturer.
Delivery:
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