NXP Semiconductors
MF1S70YYX_V1
MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
MF1S70yyX_V1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet Rev. 3.2 — 23 November 2017
COMPANY PUBLIC 279332 28 / 37
y = 713 μm (8 inches)
y = 715 μm (12 inches)
typical = 19 μmgap between chips
[1]
minimum = 5 μm
not applicable (12 inches)
Passivation
type sandwich structure
material PSG / nitride
thickness 500 nm / 600 nm
Au bump (substrate connected to VSS)
material > 99.9 % pure Au
hardness 35 to 80 HV 0.005
shear strength > 70 MPa
height 18 μm
within a die = ±2 μm
within a wafer = ±3 μm
height uniformity
wafer to wafer = ±4 μm
flatness minimum = ±1.5 μm
size LA, LB, VSS, TEST
[2]
= 66 μm × 66 μm
size variation ±5 μm
under bump metallization sputtered TiW
[1] The step size and the gap between chips may vary due to changing foil expansion
[2] Pads VSS and TESTIO are disconnected when wafer is sawn.
15.1 Fail die identification
Electronic wafer mapping covers the electrical test results and additionally the results of
mechanical/visual inspection. No ink dots are applied.
15.2 Package outline
For more details on the contactless modules MOA4 and MOA8 please refer to Ref. 7 and
Ref. 8.
