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MT41K1G4THD-15E:D
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
Electrical Specifications – I
CDD
Parameters
Table 7: DDR3L I
CDD
Specifications and Conditions (Rev D)
Note 1 applies to the entire table
Combined
Symbol
Individual
Die Status
Bus
Width
-187E
-15E
Units
I
CDD0
I
CDD0
=
I
DD0
+ I
DD2P0
+ 5
x4, x8
92
102
mA
I
CDD1
I
CDD1
=
I
DD1
+ I
DD2P0
+ 5
x4, x8
112
117
mA
I
CDD2P0
(slow exit)
I
CDD2P0
=
I
DD2P0
+ I
DD2P0
x4, x8
24
24
mA
I
CDD2P1
(fast exit)
I
CDD2P1
=
I
DD2P1
+ I
DD2P0
x4, x8
37
42
mA
I
CDD2Q
I
CDD2Q
=
I
DD2Q
+ I
DD2P0
x4, x8
42
47
mA
I
CDD2N
I
CDD2N
=
I
DD2N
+ I
DD2P0
x4, x8
44
49
mA
I
CDD2N T
I
CDD2NT
=
I
DD2NT
+ I
DD2P0
x4, x8
52
57
mA
I
CDD3P
I
CDD3P
= I
DD3P
+ I
DD2P0
x4, x8
42
47
mA
I
CDD3N
I
CDD3N
=
I
DD3N
+ I
DD2P0
x4, x8
47
52
mA
I
CDD4R
I
CDD4R
=
I
DD4R
+ I
DD2P0
+ 5
x4
142
162
mA
x8
157
177
I
CDD4W
I
CDD4W
=
I
DD4W
+ I
DD2P0
+ 5
x4
152
172
mA
x8
162
182
I
CDD5B
I
CDD5B
=
I
DD5B
+ I
DD2P0
x4, x8
202
212
mA
I
CDD6
I
CDD6
=
I
DD6
+ I
DD6
x4, x8
24
24
mA
I
CDD6ET
I
CDD6ET
=
I
DD6ET
+ I
DD6ET
x4, x8
30
30
mA
I
CDD7
I
CDD7
=
I
DD7
+ I
DD2P0
+ 5
x4, x8
352
402
mA
I
CDD8
I
CDD8
= 2 × I
DD2P0
+ 4
x4, x8
32
32
mA
Note:
1.
I
CDD
values reflect the combined current of both individual die. I
DD
x
represents individu-
al die values.
Preliminary
4Gb: x4, x8 1.35V TwinDie DDR3L SDRAM
Electrical Specifications – I
CDD
Parameters
PDF: 09005aef8460911b
DDR3L_4Gb_1_35V_TwinDie.pdf - Rev. B 4/11 EN
10
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
Table 8: DDR3L I
CDD
Specifications and Conditions (Rev M)
Note 1 applies to the entire table
Combined
Symbol
Individual
Die Status
Bus
Width
-15E
-125
Units
I
CDD0
I
CDD0
=
I
DD0
+ I
DD2P0
x4, x8
67
72
mA
I
CDD1
I
CDD1
=
I
DD1
+ I
DD2P0
x4, x8
82
87
mA
I
CDD2P0
(slow exit)
I
CDD2P0
=
I
DD2P0
+ I
DD2P0
x4, x8
24
24
mA
I
CDD2P1
(fast exit)
I
CDD2P1
=
I
DD2P1
+ I
DD2P0
x4, x8
40
45
mA
I
CDD2Q
I
CDD2Q
=
I
DD2Q
+ I
DD2P0
x4, x8
40
45
mA
I
CDD2N
I
CDD2N
=
I
DD2N
+ I
DD2P0
x4, x8
42
47
mA
I
CDD2N T
I
CDD2NT
=
I
DD2NT
+ I
DD2P0
x4, x8
47
52
mA
I
CDD3P
I
CDD3P
= I
DD3P
+ I
DD2P0
x4, x8
54
59
mA
I
CDD3N
I
CDD3N
=
I
DD3N
+ I
DD2P0
x4, x8
59
64
mA
I
CDD4R
I
CDD4RCDD4R
=
I
DD4R
+ I
DD2P0
x4
122
137
mA
x8
137
152
I
CDD4W
I
CDD4W
=
I
DD4W
+ I
DD2P0
x4
112
127
mA
x8
122
137
I
CDD5B
I
CDD5B
=
I
DD5B
+ I
DD2P0
x4, x8
197
202
mA
I
CDD6
I
CDD6
=
I
DD6
+ I
DD6
x4, x8
24
24
mA
I
CDD6ET
I
CDD6ET
=
I
DD6ET
+ I
DD6ET
x4, x8
30
30
mA
I
CDD7
I
CDD7
=
I
DD7
+ I
DD2P0
x4, x8
217
232
mA
I
CDD8
I
CDD8
= 2 × I
DD2P0
+ 4
x4, x8
28
28
mA
Note:
1.
I
CDD
values reflect the combined current of both individual die. I
DD
x
represents individu-
al die values.
Preliminary
4Gb: x4, x8 1.35V TwinDie DDR3L SDRAM
Electrical Specifications – I
CDD
Parameters
PDF: 09005aef8460911b
DDR3L_4Gb_1_35V_TwinDie.pdf - Rev. B 4/11 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
Package Dimensions
Figure 5: 78-Ball FBGA (package code THD)
Ball A1 ID
Seating
plane
0.12
A
A
0.85 ±0.1
1.2 MAX
0.25 MIN
9 ±0.15
Ball A1 ID
9.6 CTR
Solder ball
material: SAC305.
Dimensions apply
to solder balls post-
reflow on Ø0.33
NSMD ball pads.
78X
Ø
0.45
11.5 ±0.15
0.8 TYP
0.8 TYP
6.4 CTR
9
8
7
3
2
1
A
B
C
D
E
F
G
H
J
K
L
M
N
Notes:
1.
All dimensions are in millimeters.
2.
Solder ball material: SAC305 (96.5% Sn, 3% Ag, 0.5% Cu).
Preliminary
4Gb: x4, x8 1.35V TwinDie DDR3L SDRAM
Package Dimensions
PDF: 09005aef8460911b
DDR3L_4Gb_1_35V_TwinDie.pdf - Rev. B 4/11 EN
12
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
P1-P3
P4-P6
P7-P9
P10-P12
P13-P13
MT41K1G4THD-15E:D
Mfr. #:
Buy MT41K1G4THD-15E:D
Manufacturer:
Micron
Description:
IC DRAM 4G PARALLEL 78FBGA
Lifecycle:
New from this manufacturer.
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