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74LVCH32374AEC,551

P1-P3P4-P6P7-P9P10-P12P13-P15
74LVCH32374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 18 December 2012 10 of 15
NXP Semiconductors
74LVCH32374A
32-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
Table 8. Measurement points
Supply voltage Input Output
V
CC
V
I
V
M
V
M
V
X
V
Y
1.2 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
1.65 V to 1.95 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
2.3 V to 2.7 V V
CC
0.5 V
CC
0.5 V
CC
V
OL
+ 0.15 V V
OH
0.15 V
2.7 V 2.7 V 1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
Test data is given in Table 9. Definitions for test circuit:
R
L
= Load resistance
C
L
= Load capacitance including jig and probe capacitance
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse generator
Fig 7. Load circuitry for switching times
Table 9. Test data
Supply voltage Input Load V
EXT
V
I
t
r
, t
f
C
L
R
L
t
PLH
, t
PHL
t
PLZ
, t
PZL
t
PHZ
, t
PZH
1.2 V V
CC
2 ns 30 pF 1 k open 2 V
CC
GND
1.65 V to 1.95 V V
CC
2 ns 30 pF 1 k open 2 V
CC
GND
2.3 V to 2.7 V V
CC
2 ns 30 pF 500 open 2 V
CC
GND
2.7V 2.7V 2.5 ns 50 pF 500 open 2 V
CC
GND
3.0Vto3.6V 2.7V 2.5 ns 50 pF 500 open 2 V
CC
GND
74LVCH32374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 18 December 2012 11 of 15
NXP Semiconductors
74LVCH32374A
32-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
12. Package outline
Fig 8. Package outline SOT536-1 (LFBGA96)
0.8
A
1
bA
2
UNIT
D
ye
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
00-03-04
03-02-05
IEC JEDEC JEITA
mm
1.5
0.41
0.31
1.2
0.9
5.6
5.4
y
1
13.6
13.4
0.51
0.41
0.1 0.2
e
1
4
e
2
12
DIMENSIONS (mm are the original dimensions)
SOT536-1
E
0.15
v
0.1
w
0 5 10 mm
scale
SOT536-1
LFBGA96: plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 x 5.5 x 1.05 mm
A
max.
A
A
2
A
1
detail X
e
e
X
D
E
A
B
C
D
E
F
H
G
J
K
L
M
P
N
R
T
246135
B
A
e
2
e
1
ball A1
index area
ball A1
index area
y
y
1
C
b
C
AC
C
B
∅ v
M
∅ w
M
1/2 e
1/2 e
74LVCH32374A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 18 December 2012 12 of 15
NXP Semiconductors
74LVCH32374A
32-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged Device Model
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVCH32374A v.3 20121218 Product data sheet - 74LVCH32374A v.2
Modifications:
• The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Table 4, Table 5, Table 6 , Table 7, Table 8 and Table 9: values added for lower voltage
ranges.
74LVCH32374A v.2 20040519 Product specification - 74LVCH32374A v.1
74LVCH32374A v.1 19991124 Product specification - -
P1-P3P4-P6P7-P9P10-P12P13-P15

74LVCH32374AEC,551

Mfr. #:
Buy 74LVCH32374AEC,551
Manufacturer:
NXP Semiconductors
Description:
Flip Flops 32-BIT 5V TOLERANT
Lifecycle:
New from this manufacturer.
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