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LT6650IS5#TRMPBF

P1-P3P4-P6P7-P9P10-P12
LT6650
7
6650fa
APPLICATIO S I FOR ATIO
WUU
U
PI FU CTIO S
UUU
BLOCK DIAGRA
W
FB (Pin 1): Resistor Divider Feedback Pin. Connect a
resistor divider from OUT to GND and the center tap to FB.
This pin sets the output potential.
GND (Pin 2): Ground Connection.
DNC (Pin 3): Do not connect. Connected internally for post
package trim. This pin must be left unconnected.
IN (Pin 4): Positive Supply. Bypassing with a 1µF capacitor
is recommended if the output loading changes.
OUT (Pin 5): Reference Output. The output sources and
sinks current. It is stable with any load capacitor with a
total capacitance of 1µF or more. Higher load capacitance
improves load transient response.
OUT
DNC
FB
IN
GND
LT6650
–
+
V
R
= 400mV
REFERENCE
6650 BD
4
2
3
5
1
Long Battery Life
The LT6650 is a micropower, adjustable reference which
operates from supply voltages ranging from 1.4V to 18V.
The series regulated output may be configured with exter-
nal resistors to any voltage from 400mV to nearly the
supply potential. Under no-load conditions, the LT6650
dissipates only 8µW when operating on a 1.4V supply.
Other operating configurations allow the LT6650 to be
used as a micropower positive or negative adjustable
shunt reference from 1.4V to 18V.
Bypass and Load Capacitor
The LT6650 voltage reference requires a 1µF or greater
output capacitance for proper operation. This capacitance
may be provided by either a single capacitor connected
between OUT and GND or formed by the aggregate of
several capacitors that may be serving other decoupling
functions. Output impedance can be reduced by DC load-
ing of the output by 40µA to 200µA, and/or adding an R
Z
to the output capacitor for a 100µs time constant as shown
in Figure 1 and the Typical Performance Characteristics
graphs.
The LT6650 Voltage reference should have an input by-
pass capacitor of 0.1µF or larger. When the circuit is
Figure 1. LT6650 Input-Output Configuration
V
OUT
V
IN
OUT
IN
R
IN
FB
GND
LT6650
6650 F01
2
4 5
1
C
L
R
Z
C
IN
LT6650
8
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operated from a small battery or other relatively high
impedance source, a minimum 1µF capacitor is recom-
mended. PSRR can be significantly enhanced by adding a
low-pass RC filter on the input, with a time-constant of
1ms or higher, as shown in Figure 1. The Typical Perfor-
mance Characteristics graphs show performance as a
function of several combinations of input and output
capacitance.
An input RC of 100ms or more is recommended (such as
5k and 22µF) when output transients must be minimized
in the face of high supply noise, such as in automotive
applications. Figure 2 shows an input filter structure that
effectively eliminates supply transients from affecting the
output. With this extra input decoupling and the LT6650
operating normally from a 12V bus, 50V transients induce
less than <0.5% V
OUT
perturbations.
Figure 3 shows the turn-on response time for the circuit in
Figure 1. The input voltage steps from 0V to 3V, and the
output is configured to produce 400mV. Input bypass and
output load capacitance are 1µF, R
IN
= 0Ω, R
Z
= 0Ω, and
the output settles in approximately 0.5ms. Figure 4 shows
APPLICATIO S I FOR ATIO
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Figure 2. High Noise-Immunity Input Network
Figure 3. LT6650 Turn-On Characteristic
Figure 4. Output Response to ±0.5V Input Step
Figure 5. Output Response to Bidirectional Load Step
(100µA to –100µA)
Figure 6. Output Response to Current-Sourcing Load Step
(–100µA to –200µA)
V
IN
4.7k
NOISY
POWER BUS
6650 F02
22µF
1N751
5V
33k
1µF
the same circuit responding to input transients of 0.5V,
settling in about 0.3ms. Figures 5 through 7 show the
same circuit responding to various load steps: changes
between ±100µA in Figure 5; sourcing current step be-
tween –100µA and –200µA in Figure 6; and sinking current
6650 F05
V
OUT
10mV/DIV
I
OUT
SINKING
SOURCING
100µA
SINKING
100µA
SOURCING
6650 F06
V
OUT
10mV/DIV
AC
I
OUT
–100µA
–200µA
V
OUT
0.2ms/DIV 6650 F03
V
IN
3V
0V
0.4V
0V
2ms/DIV
6650 F04
V
IN
V
OUT
3V
2.5V
0.4V
0V
LT6650
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Figure 9. Typical Configuration of LT6650 as Adjustable Positive
Shunt Reference
Figure 10. Typical Configuration of LT6650 as Adjustable
Negative Shunt Reference
APPLICATIO S I FOR ATIO
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step between 100µA and 200µA in Figure 7. Load step settling
occurs in about 0.5ms or less (to ±0.2%).
Output Adjustment
If the LT6650 is to be used as a 400mV reference, then the
output and feedback pins may be tied together without any
scale-setting components as shown in the front-page
application circuit. Setting the output to any higher voltage
is a simple matter of selecting two feedback resistors to
configure the non-inverting gain of the internal operational
amplifier, as shown in Figure 8. A feedback resistor R
F
is
connected between the OUT pin and the FB pin, and a gain
resistor R
G
is connected from the FB pin to GND. The
resistor values are related to the output voltage by the
following relationship:
R
F
= R
G
• (V
OUT
– 0.4)/(0.4 – I
FB
• R
G
)
The I
FB
term represents the FB pin bias current, and can
generally be neglected when R
G
is 100k or less. For
R
G
≤ 20k, even worst-case I
FB
can be neglected (error
contribution <0.15%). Since the V
OUT
error distribution
increases at twice the resistor tolerance, high accuracy
resistors or resistor networks are recommended. The
output voltage may be set to any level from 400mV up to
350mV below the supply voltage with source or sink
capability.
Noise Reduction Capacitor
In applications involving the use of resistive feedback for
reference scaling, the intrinsic reference noise is amplified
along with the DC level. To minimize noise amplification,
the use of a 1nF feedback capacitor is recommended, as
shown in Figure 8 and other circuits with scaling resistors.
Shunt Reference Operation
The circuits shown in Figure 9 and Figure 10 form adjust-
able shunt references. Along with the external bias resistor
R
B
, the LT6650 provides positive or negative reference
operation for outputs between 1.4V and 18V (positive or
negative). Just like a Zener diode, a supply V
S
is required,
somewhat higher in magnitude than the desired reference
V
OUT
6650 F09
10µF
OUTIN
FB
GND
LT6650
2
45
1
V
S
R
F
R
B
R
G
1nF
V
OUT
= 0.4V • (1 + R
F
/R
G
)
V
OUT
6650 F10
10µF
OUTIN
FB
GND
LT6650
2
45
1
R
F
–V
S
R
B
R
G
1nF
V
OUT
= –0.4V • (1 + R
F
/R
G
)
Figure 8. Typical Configuration for Output Voltages
Greater than 0.4V
V
OUT
6650 F08
1µF1µF
1nF
OUTIN
FB
GND
LT6650
2
45
1
V
S
1k
R
F
R
G
V
OUT
= 0.4V • (1 + R
F
/R
G
)
Figure 7. Output Response to Current-Sinking Load Step
(100µA to 200µA)
6650 F07
V
OUT
10mV/DIV
AC
I
OUT
200µA
100µA
P1-P3P4-P6P7-P9P10-P12

LT6650IS5#TRMPBF

Mfr. #:
Buy LT6650IS5#TRMPBF
Manufacturer:
Analog Devices Inc.
Description:
Voltage References uP, 400mV Ref w/ R2R Buf Amp in SOT-23
Lifecycle:
New from this manufacturer.
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