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AD8037AR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
AD8036/AD8037
REV. B
–19–
The circuit uses an AD8037 operating at a gain of two with an
AD811 to boost the output to the ± 12 V range. The AD811 was
chosen for its ability to operate with ±15 V supplies and its high
slew rate.
R1 and R2 act as a level shifter to make the TTL signal levels be
approximately symmetrical above and below ground. This ensures
that both the high and low logic levels will be clamped by the
AD8037. For well controlled signal levels in the output pulse,
the high and low output levels should result from the clamping
action of the AD8037 and not be controlled by either the high
or low logic levels passing through a linear amplifier. For good
rise and fall times at the output pulse, a logic family with high
speed edges should be used.
The high logic levels are clamped at two times the voltage at V
H
,
while the low logic levels are clamped at two times the voltage
at V
L
. The output of the AD8037 is amplified by the AD811
operating at a gain of 5. The overall gain of 10 will cause the
high output level to be 10 times the voltage at V
H
, and the low
output level to be 10 times the voltage at V
L
.
High Speed, Full-Wave Rectifier
The clamping inputs are additional inputs to the input stage of
the op amp. As such they have an input bandwidth comparable
to the amplifier inputs and lend themselves to some unique
functions when they are driven dynamically.
Figure 12 is a schematic for a full-wave rectifier, sometimes
called an absolute value generator. It works well up to 20 MHz
and can operate at significantly higher frequencies with some
degradation in performance. The distortion performance is sig-
nificantly better than diode based full-wave rectifiers, especially
at high frequencies.
V
OUT
=
V
IN
+5V
R
F
274
–5V
100
V
H
V
L
V
IN
0.1F10F
AD8037
0.1F
10F
R
G
274
Figure 12. Full-Wave Rectifier
TTL
IN
+15V
PULSE
OUT
V
H
10
V
L
10
–15V
+5V
274
–5V
100
V
H
V
L
0.1F
10F
0.1F
AD8037
0.1F10F
V
H
0.1F
V
L
274
1.3k
200
100
AD811
–15V
0.1F10F
0.1F
10F
604
150
Figure 11. Programmable Pulse Generator
The circuit is configured as an inverting amplifier with a gain
of one. The input drives the inverting amplifier and also directly
drives V
L
, the lower level clamping input. The high level clamp-
ing input, V
H
, is left floating and plays no role in this circuit.
When the input is negative, the amplifier acts as a regular unity-
gain inverting amplifier and outputs a positive signal at the same
amplitude as the input with opposite polarity. V
L
is driven nega-
tive by the input, so it performs no clamping action, because the
positive output signal is always higher than the negative level
driving V
L
.
When the input is positive, the output result is the sum of two
separate effects. First, the inverting amplifier multiplies the input
by –1 because of its unity-gain inverting configuration. This
effectively produces an offset as explained above, but with a
dynamic level that is equal to –1 times the input.
Second, although the positive input is grounded (through 100 Ω),
the output is clamped at two times the voltage applied to V
L
(a
positive, dynamic voltage in this case). The factor of two is
because the noise gain of the amplifier is two.
The sum of these two actions results in an output that is equal
to unity times the input signal for positive input signals, see Fig-
ure 13. For a input/output scope photo with an input signal of
20 MHz and amplitude ±1 V, see Figure 14.
INPUT
FULL WAVE
RECTIFIED
OUTPUT
LOWER
CLAMPING
LEVEL WITH
NO NEG INPUT
OUTPUT
LOWER
CLAMPING
LEVEL
–1 INPUT
Figure 13.
REV. B
–20–
AD8036/AD8037
Figure 14. Full-Wave Rectifier Scope
Thus for either positive or negative input signals, the output is
unity times the absolute value of the input signal. The circuit
can be easily configured to produce the negative absolute value
of the input by applying the input to V
H
instead of V
L
.
The circuit can get to within about 40 mV of ground during the
time when the input crosses zero. This voltage is fixed over a
wide frequency range and is a result of the switching between
the conventional op amp input and the clamp input. But because
there are no diodes to rapidly switch from forward to reverse bias,
the performance far exceeds that of diode based full wave rectifiers.
The 40 mV offset mentioned can be removed by adding an off-
set to the circuit. A 27.4 kΩ input resistor to the inverting input
will have a gain of 0.01, while changing the gain of the circuit
by only 1%. A plus or minus 4 V dc level (depending on the
polarity of the rectifier) into this resistor will compensate for
the offset.
Full wave rectifiers are useful in many applications including
AM signal detection, high frequency ac voltmeters and various
arithmetic operations.
Amplitude Modulator
In addition to being able to be configured as an amplitude
demodulator (AM detector), the AD8037 can also be config-
ured as an amplitude modulator as shown in Figure 15.
CARRIER IN
V
H
AM OUT
MODULATION IN
+5V
R
F
274
–5V
100
V
H
V
L
0.1F10F
AD8037
0.1F
10F
R
G
274
Figure 15. Amplitude Modulator
The positive input of the AD8037 is driven with a square wave
of sufficient amplitude to produce clamping action at both the
high and low levels. This is the higher frequency carrier signal.
The modulation signal is applied to both the input of a unity
gain inverting amplifier and to V
L
, the lower clamping input.
V
H
is biased at 0.5 V dc.
To understand the circuit operation, it is helpful to first con-
sider a simpler circuit. If both V
L
and
V
H
were dc biased at
–0.5 V and the carrier and modulation inputs driven as above,
the output would be a 2 V p-p square wave at the carrier fre-
quency riding on a waveform at the modulating frequency. The
inverting input (modulation signal) is creating a varying offset to
the 2 V p-p square wave at the output. Both the high and low
levels clamp at twice the input levels on the clamps because the
noise gain of the circuit is two.
When V
L
is driven by the modulation signal instead of being held
at a dc level, a more complicated situation results. The resulting
waveform is composed of an upper envelope and a lower enve-
lope with the carrier square wave in between. The upper and
lower envelope waveforms are 180° out of phase as in a typical
AM waveform.
The upper envelope is produced by the upper clamp level being
offset by the waveform applied to the inverting input. This offset
is the opposite polarity of the input waveform because of the
inverting configuration.
The lower envelope is produced by the sum of two effects. First,
it is offset by the waveform applied to the inverting input as in
the case of the simplified circuit above. The polarity of this off-
set is in the same direction as the upper envelope. Second, the
output is driven in the opposite direction of the offset at twice
the offset voltage by the modulation signal being applied to V
L
.
This results from the noise gain being equal to two, and since
there is no inversion in this connection, it is opposite polarity
from the offset.
The result at the output for the lower envelope is the sum of
these two effects, which produces the lower envelope of an
amplitude modulated waveform. See Figure 16.
Figure 16. AM Waveform
The depth of modulation can be modified in this circuit by
changing the amplitude of the modulation signal. This changes
the amplitude of the upper and lower envelope waveforms.
The modulation depth can also be changed by changing the dc
bias applied to V
H
. In this case the amplitudes of the upper and
lower envelope waveforms stay constant, but the spacing between
them changes. This alters the ratio of the envelope amplitude to
the amplitude of the overall waveform.
AD8036/AD8037
REV. B
–21–
Layout Considerations
The specified high speed performance of the AD8036 and
AD8037 requires careful attention to board layout and component
selection. Proper RF design techniques and low pass parasitic
component selection are mandatory.
The PCB should have a ground plane covering all unused
portions of the component side of the board to provide a low
impedance path. The ground plane should be removed from the
area near the input pins to reduce stray capacitance.
Chip capacitors should be used for supply and input clamp
bypassing (see Figure 17). One end should be connected to
the ground plane and the other within 1/8 inch of each power
and clamp pin. An additional large (0.47 µF–10 µF) tantalum
electrolytic capacitor should be connected in parallel, though
not necessarily so close, to supply current for fast, large signal
changes at the output.
The feedback resistor should be located close to the inverting
input pin in order to keep the stray capacitance at this node to a
minimum. Capacitance variations of less than 1 pF at the invert-
ing input will significantly affect high speed performance.
Stripline design techniques should be used for long signal traces
(greater than about 1 inch). These should be designed with a
characteristic impedance of 50 Ω or 75 Ω and be properly termi-
nated at each end.
Evaluation Board
An evaluation board for both the AD8036 and AD8037 is
available that has been carefully laid out and tested to demon-
strate that the specified high speed performance of the device
can be realized. For ordering information, please refer to the
Ordering Guide.
The layout of the evaluation board can be used as shown or
serve as a guide for a board layout.
IN
R
O
1k
V
OUT
0.1F
AD8036/
AD8037
V
H
0.1F
V
L
R
S
–V
S
+V
S
–V
S
+V
S
R
G
R
F
1k
–V
S
+V
S
R
T
NONINVERTING CONFIGURATION
C5
10F
+V
S
–V
S
C3
0.1F
C1
0.01F
C6
10F
C4
0.1F
C2
0.01F
OPTIONAL
SUPPLY BYPASSING
Figure 17. Noninverting Configurations for Evaluation
Boards
Table I.
AD8036A AD8037A
Gain Gain
Component +1 +2 +10 +100 +2 +10 +100
R
F
140 Ω 274 Ω 2 kΩ 2 kΩ 274 Ω 2 kΩ 2 kΩ
R
G
274 Ω 221 Ω 20.5 Ω 274 Ω 221 Ω 20.5 Ω
R
O
(Nominal) 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω
R
S
130 Ω 100 Ω 100 Ω 100 Ω 100 Ω 100 Ω 100 Ω
R
T
(Nominal) 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω
Small Signal BW (MHz) 240 90 10 1.3 275 21 3
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23

AD8037AR

Mfr. #:
Buy AD8037AR
Manufacturer:
Analog Devices Inc.
Description:
Operational Amplifiers - Op Amps Low Distort Wide BW VTG Feedback
Lifecycle:
New from this manufacturer.
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