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NB4L6254MNR4G

P1-P3P4-P6P7-P9P10-P11
NB4L6254
http://onsemi.com
4
Table 4. ATTRIBUTES
Characteristics Value
Internal Input Pullup Resistor
37.5 kW
Internal Input Pulldown Resistor
75 kW
ESD Protection Human Body Model
Machine Model
> 2000 V
> 200 V
Latchup Immunity >200 mA
Cin, inputs 4.0 pF (TYP)
Moisture Sensitivity (Note 1) LQFP−32
QFN32
Level 2
Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 336
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 5. MAXIMUM RATINGS (Note 2)
Symbol Parameter Condition Condition Rating Unit
V
CC
Positive Power Supply −0.3 v V
CC
v 3.6 V
V
IN
DC Input Voltage −0.3 v V
IN
v V
CC
+ 0.3
V
V
OUT
DC Output Voltage −0.3 v V
OUT
v V
CC
+ 0.3
V
I
IN
DC Input Current $20 mA
I
out
LVPECL DC Output Current Continuous
Surge
$50
100
mA
mA
T
A
Operating Temperature Range LQFP−32 −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient)
(Note 3)
0 lfpm
500 lfpm
LQFP−32
LQFP−32
80
55
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) 2S2P (Note 3) LQFP−32 12 to 17 °C/W
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
QFN−32
QFN−32
31
27
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) 2S2P QFN−32 12 °C/W
T
sol
Wave Solder Pb−Free 265 °C
V
TT
Output Termination Voltage V
CC
– 2.0, TYP V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Maximum Ratings are those values beyond which device damage may occur.
3. JEDEC standard multilayer board − 2S2P (2 signal, 2 power); MIL−SPEC 883E Method 1012.1.
NB4L6254
http://onsemi.com
5
Table 6. DC CHARACTERISTICS V
CC
= 2.375 V to 3.465 V, GND = 0 V, T
A
= −40°C to +85°C
Symbol
Characteristic Min Typ Max Unit
POWER SUPPLY CURRENT
I
GND
Power Supply Current (Outputs Open) 60 85 mA
LVPECL CLOCK OUTPUTS
V
OH
LVPECL Output HIGH Voltage (Notes 4, 5)
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
− 1145
2155
1355
V
CC
− 1020
2280
1480
V
CC
– 895
2405
1605
mV
V
OL
LVPECL Output LOW Voltage (Notes 4, 5)
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
− 1945
1355
555
V
CC
− 1770
1530
730
V
CC
− 1600
1700
900
mV
CLOCK INPUTS
V
PP
Dynamic Differential Input Voltage (Clock Inputs) 0.1 1.3 V
V
CMR
Differential Cross−point Voltage (Clock Inputs) 1.0 V
CC
− 0.3 V
LVCMOS CONTROL INPUTS
V
IH
Output HIGH Voltage (LVTTL/LVCMOS) 2.0 V
V
IL
Output LOW Voltage (LVTTL/LVCMOS) 0.8 V
I
IH
Input Current V
IN
= V
CC
or V
IN
= GND −100 +100
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. LVPECL Outputs loaded with 50 W termination resistors to V
TT
= V
CC
– 2.0 V for proper operation.
5. LVPECL Output parameters vary 1:1 with V
CC
.
NB4L6254
http://onsemi.com
6
Table 7. AC CHARACTERISTICS V
CC
= 2.375 V to 3.465 V, GND = 0 V, T
A
= −40°C to +85°C (Note 6)
Symbol
Characteristic Min Typ Max Unit
V
INPP
Differential Input Voltage (Peak−to−Peak) 0.3 1.3 V
V
CMR
Differential Input Cross−Point Voltage (Clock Inputs) 1.2 V
CC
− 0.3 V
f
IN
Clock Input Frequency 0 3.0 GHz
V
OUTPP
Differential Output Output Voltage Amplitude (Peak−to−Peak)
(Note 7) f
O
< 1.1 GHz
f
O
< 2.5 GHz
f
O
< 3.0 GHz
0.45
0.35
0.2
0.70
0.55
0.35
V
f
CLKOUT
Output Clock Frequency Range 0 3.0 GHz
t
pd
Propagation Delay CLKx to Qx (Differential Configuration) 360 485 610 ps
t
skew
Within Device Output−to−Output Skew (Differential Configuration)
Device−to−Device Skew
Output Pulse Skew (Duty Cycle Skew) (Note 8)
25
30
10
50
250
60
ps
DCO Output CLOCK Duty Cycle (DC Ref = 50%) t
REF
<100 MHz
(Note 9) t
REF
< 800 MHz
49.4
45.2
50.6
54.8
%
t
JIT
CLOCK Random Jitter (RMS) (SEL0 0 SEL1) (Note 10) 0.3 0.8 ps
t
r
, t
f
Output Rise/Fall Times (Note 11) CLKx / CLKx 50 130 300 ps
t
PDL
Output Disable Time, T = CLK period 2.5 T + t
PD
3.5 T + t
PD
ns
tPLD Output Enable Time, T = CLK period 3 T + t
PD
4 T + t
PD
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. LVPECL Outputs loaded with 50 W to V
CC
− 2.0V.
7. V
OUTPP
MIN = 0.1 V @ +85°C, f
O
< 3.0 GHz.
8. Output Pulse Skew is the absolute difference of the propagation delay times: |t
PLH
− t
PHL
|
9. DCO
MIN/MAX
= 43.2%/59.2% @ +85°C.
10.t
JITMAX
= 1.6 ps @ 85°C, 3.0 V
11. Measured 20% to 80%
P1-P3P4-P6P7-P9P10-P11

NB4L6254MNR4G

Mfr. #:
Buy NB4L6254MNR4G
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution LVPECL 2X2 SWITCH FANOUT
Lifecycle:
New from this manufacturer.
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