Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 05 — 15 December 2004 49 of 55
9397 750 14472
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Fig 16. SPI master timing (CPHA = 1).
t
CLCL
t
SPICLKL
t
SPICLKH
Master LSB/MSB outMaster MSB/LSB out
t
SPIDH
t
SPIDSU
t
SPICLKH
t
SPICLKL
t
SPIF
t
SPIOH
t
SPIDV
t
SPIDV
t
SPIR
t
SPIDV
t
SPIF
t
SPIR
t
SPIF
t
SPIR
SS
SPICLK
(CPOL = 0)
(output)
002aaa157
SPICLK
(CPOL = 1)
(output)
MISO
(input)
MOSI
(output)
LSB/MSB in
MSB/LSB in
Fig 17. SPI slave timing (CPHA = 0).
t
CLCL
t
SPICLKH
t
SPICLKL
t
SPILEAD
t
SPICLKH
t
SPICLKL
t
SPILAG
t
SPIDSU
t
SPIDH
t
SPIDH
t
SPIDSU
t
SPIDSU
t
SPIR
t
SPIA
t
SPIOH
t
SPIOH
t
SPIDIS
t
SPIR
Slave MSB/LSB out
MSB/LSB in LSB/MSB in
Slave LSB/MSB out
t
SPIDV
t
SPIOH
t
SPIDV
t
SPIR
t
SPIF
t
SPIR
t
SPIF
SS
SPICLK
(CPOL = 0)
(input)
002aaa158
SPICLK
(CPOL = 1)
(input)
MISO
(output)
MOSI
(input)
Not defined
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 05 — 15 December 2004 50 of 55
9397 750 14472
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Fig 18. SPI slave timing (CPHA = 1).
t
CLCL
t
SPICLKH
t
SPICLKL
t
SPILEAD
t
SPICLKH
t
SPICLKL
t
SPILAG
t
SPIDSU
t
SPIDH
t
SPIDH
t
SPIDSU
t
SPIR
t
SPIA
t
SPIOH
t
SPIDIS
t
SPIR
Slave MSB/LSB out
Not defined
MSB/LSB in LSB/MSB in
Slave LSB/MSB out
t
SPIDV
t
SPIOH
t
SPIDV
t
SPIOH
t
SPIDV
t
SPIR
t
SPIF
t
SPIR
t
SPIF
SS
SPICLK
(CPOL = 0)
(input)
002aaa159
SPICLK
(CPOL = 1)
(input)
MISO
(output)
MOSI
(input)
t
SPIDSU
Fig 19. Shift register mode timing.
01234567
Valid Valid Valid Valid Valid Valid Valid Valid
t
XLXL
002aaa425
Set TI
Set RI
t
XHQX
t
QVXH
t
XHDV
t
XHDX
Clock
Output Data
Write to SBUF
Input Data
Clear RI
Fig 20. External clock timing.
t
CHCL
t
CLCX
t
CHCX
t
C
t
CLCH
002aaa416
0.2 V
DD
+ 0.9
0.2 V
DD
- 0.1 V
V
DD
- 0.5 V
0.45 V
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data Rev. 05 — 15 December 2004 51 of 55
9397 750 14472
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
12. Comparator electrical characteristics
[1] This parameter is characterized, but not tested in production.
Table 10: AC characteristics, ISP entry mode
V
DD
= 2.4 V to 3.6 V, unless otherwise specified.
T
amb
=
40
°
Cto+85
°
C for industrial, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
t
VR
RST delay from V
DD
active 50 - - µs
t
RH
RST HIGH time 1 - 32 µs
t
RL
RST LOW time 1 - - µs
Fig 21. ISP entry waveform.
002aaa426
V
DD
RST
t
RL
t
VR
t
RH
Table 11: Comparator electrical characteristics
V
DD
= 2.4 V to 3.6 V, unless otherwise specified.
T
amb
=
40
°
Cto+85
°
C for industrial, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V
IO
offset voltage comparator inputs - - ±20 mV
V
CR
common mode range comparator inputs 0 - V
DD
0.3 V
CMRR common mode rejection ratio
[1]
--50 dB
response time - 250 500 ns
comparator enable to output valid - - 10 µs
I
IL
input leakage current, comparator 0 < V
IN
<V
DD
--±10 µA

P89LPC9311FDH,129

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 8KB FLASH 28TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
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