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MAX9123EUE+

P1-P3P4-P6P7-P9P10-P10
General Description
The MAX9123 quad low-voltage differential signaling
(LVDS) differential line driver is ideal for applications
requiring high data rates, low power, and low noise. The
MAX9123 is guaranteed to transmit data at speeds up to
800Mbps (400MHz) over controlled impedance media of
approximately 100Ω. The transmission media may be
printed circuit (PC) board traces, backplanes, or cables.
The MAX9123 accepts four LVTTL/LVCMOS input levels
and translates them to LVDS output signals. Moreover,
the MAX9123 is capable of setting all four outputs to a
high-impedance state through two enable inputs, EN and
EN, thus dropping the device to an ultra-low-power state
of 16mW (typ) during high impedance. The enables are
common to all four transmitters. Outputs conform to the
ANSI TIA/EIA-644 LVDS standard. Flow-through pinout
simplifies PC board layout and reduces crosstalk by sep-
arating the LVTTL/LVCMOS inputs and LVDS outputs.
The MAX9123 operates from a single +3.3V supply and is
specified for operation from -40°C to +85°C. It is available
in 16-pin TSSOP and SO packages. Refer to the MAX9121/
MAX9122* data sheet for quad LVDS line receivers with
integrated termination and flow-through pinout.
Applications
Features
♦ Flow-Through Pinout
Simplifies PC Board Layout
Reduces Crosstalk
♦ Pin Compatible with DS90LV047A
♦ Guaranteed 800Mbps Data Rate
♦ 250ps Maximum Pulse Skew
♦ Conforms to TIA/EIA-644 LVDS Standard
♦ Single +3.3V Supply
♦ 16-Pin TSSOP and SO Packages
MAX9123
Quad LVDS Line Driver with
Flow-Through Pinout
________________________________________________________________ Maxim Integrated Products 1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
EN OUT1-
OUT1+
OUT2+
OUT2-
OUT3-
OUT3+
OUT4+
OUT4-
TOP VIEW
MAX9123
TSSOP/SO
IN1
IN2
IN3
V
CC
GND
IN4
EN
Pin Configuration
Ordering Information
107Ω
MAX9123
MAX9122*
107Ω
107Ω
107Ω
R
X
LVDS SIGNALS
100Ω SHIELDED TWISTED CABLE OR MICROSTRIP PC BOARD TRACES
LVTTL/CMOS
DATA INPUT
LVTTL/CMOS
DATA OUTPUT
R
X
R
X
R
X
T
X
T
X
T
X
T
X
Typical Applications Circuit
19-1927; Rev 0; 2/01
For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PART TEMP. RANGE PIN-PACKAGE
MAX9123EUE -40°C to +85°C 16 TSSOP
MAX9123ESE -40°C to +85°C 16 SO
* Future product—contact factory for availability.
Digital Copiers
Laser Printers
Cell Phone Base
Stations
Add Drop Muxes
Digital Cross-Connects
DSLAMs
Network
Switches/Routers
Backplane
Interconnect
Clock Distribution
MAX9123
Quad LVDS Line Driver with
Flow-Through Pinout
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, R
L
= 100Ω ±1%, T
A
= -40°C to +85°C. Typical values are at V
CC
= +3.3V, T
A
= +25°C, unless otherwise
noted.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC
to GND...........................................................-0.3V to +4.0V
IN_, EN, EN to GND....................................-0.3V to (V
CC
+ 0.3V)
OUT_+, OUT_- to GND..........................................-0.3V to +3.9V
Short-Circuit Duration (OUT_+, OUT_-) .....................Continuous
Continuous Power Dissipation (T
A
= +70°C)
16-Pin TSSOP (derate 9.4mW/°C above +70°C) .........755mW
16-Pin SO (derate 8.7mW/°C above +70°C)................696mW
Storage Temperature Range .............................-65°C to +150°C
Maximum Junction Temperature .....................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Lead Temperature (soldering, 10s) .................................+300°C
ESD Protection
Human Body Model, IN_, OUT_+, OUT_-.......................±4kV
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LVDS OUTPUT (OUT_+, OUT_-)
Differential Output Voltage V
OD
Figure 1
250
368 450 mV
Change in Magnitude of V
OD
Between Complementary Output
States
∆V
OD
Figure 1 1 35 mV
Offset Voltage V
OS
Figure 1
1.125 1.25 1.375
V
Change in Magnitude of V
OS
Between Complementary Output
States
∆V
OS
Figure 1 4 25 mV
Output High Voltage V
OH
1.6 V
Output Low Voltage V
OL
0.90
V
Differential Output Short-Circuit
Current (Note 3)
I
OSD
Enabled, V
OD
= 0 -9 mA
Output Short-Circuit Current I
OS
OUT_+ = 0 at IN_ = V
CC
or OUT_- = 0 at IN_
= 0, enabled
-3.8
-9 mA
I
OZ
EN = low and EN = high, OUT_+ = 0 or V
CC
,
OUT_- = 0 or V
CC
, R
L
= ∞
-10 10 µA
Power-Off Output Current I
OFF
V
CC
= 0 or open, OUT_+ = 0 or 3.6V, OUT_-
= 0 or 3.6V, R
L
= ∞
-20 20 µA
INPUTS (IN_, EN, EN)
High-Level Input Voltage V
IH
2.0
V
CC
V
Low-Level Input Voltage V
IL
GND
0.8 V
Input Current I
IN
IN_, EN, EN = 0 or V
CC
-20 20 µA
SUPPLY CURRENT
No-Load Supply Current I
CC
R
L
= ∞, IN_ = V
CC
or 0 for all channels 9.2 11 mA
Loaded Supply Current I
CCL
R
L
= 100Ω, IN_ = V
CC
or 0 for all channels
22.7
30 mA
Disabled Supply Current I
CCZ
D i sab l ed , IN _ = V
C C
or 0 for all channel s,
E N = 0, EN = V
CC
4.9 6 mA
MAX9123
Quad LVDS Line Driver with
Flow-Through Pinout
_______________________________________________________________________________________ 3
SWITCHING CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, R
L
= 100Ω ±1%, C
L
= 15pF, T
A
= -40°C to +85°C. Typical values are at V
CC
= +3.3V, T
A
= +25°C, unless
otherwise noted.) (Notes 4, 5, 6)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Differential Propagation Delay
High to Low
t
PHLD
Figures 2 and 3 0.7 1.7 ns
Differential Propagation Delay
Low to High
t
PLHD
Figures 2 and 3 0.7 1.7 ns
Differential Pulse Skew (Note 7) t
SKD1
Figures 2 and 3 0.04 0.25 ns
Differential Channel-to-Channel
Skew (Note 8)
t
SKD2
Figures 2 and 3 0.07 0.35 ns
Differential Part-to-Part Skew
(Note 9)
t
SKD3
Figures 2 and 3 0.13 0.8 ns
Differential Part-to-Part Skew
(Note 10)
t
SKD4
Figures 2 and 3
0.43 1.0 ns
Rise Time t
TLH
Figures 2 and 3 0.2 0.39 1.0 ns
Fall Time t
THL
Figures 2 and 3 0.2 0.39 1.0 ns
Disable Time High to Z t
PHZ
Figures 4 and 5 2.7 5 ns
Disable Time Low to Z t
PLZ
Figures 4 and 5 2.7 5 ns
Enable Time Z to High t
PZH
Figures 4 and 5 2.3 7 ns
Enable Time Z to Low t
PZL
Figures 4 and 5 2.3 7 ns
Maximum Operating Frequency
(Note 11)
f
MAX
400 MHz
Note 1: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are 100% tested
at T
A
= +25°C.
Note 2: Currents into the device are positive, and current out of the device is negative. All voltages are referenced to ground except
V
OD
.
Note 3: Guaranteed by correlation data.
Note 4: AC parameters are guaranteed by design and characterization.
Note 5: C
L
includes probe and jig capacitance.
Note 6: Signal generator conditions for dynamic tests: V
OL
= 0, V
OH
= 3V, f = 100MHz, 50% duty cycle, R
O
= 50Ω, t
R
≤ 1ns, t
F
≤
1ns (0% to 100%).
Note 7: t
SKD1
is the magnitude difference of differential propagation delay. t
SKD1
= |t
PHLD
- t
PLHD
|.
Note 8: t
SKD2
is the magnitude difference of t
PHLD
or t
PLHD
of one channel to the t
PHLD
or t
PLHD
of another channel on the same
device.
Note 9: t
SKD3
is the magnitude difference of any differential propagation delays between devices at the same V
CC
and within 5°C
of each other.
Note 10: t
SKD4
is the magnitude difference of any differential propagation delays between devices operating over the rated supply
and temperature ranges.
Note 11: f
MAX
signal generator conditions: V
OL
= 0, V
OH
= 3V, f = 400MHz, 50% duty cycle, R
O
= 50Ω, t
R
≤ 1ns, t
F
≤ 1ns (0% to
100%). Transmitter output criteria: duty cycle = 45% to 55%, V
OD
≥ 250mV.
P1-P3P4-P6P7-P9P10-P10

MAX9123EUE+

Mfr. #:
Buy MAX9123EUE+
Manufacturer:
Maxim Integrated
Description:
LVDS Interface IC Quad LVDS Line Driver
Lifecycle:
New from this manufacturer.
Delivery:
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