ULTRA LOW CURRENT CONSUMPTION, HIGH RIPPLE REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.0_00
S-1167 Series
Seiko Instruments Inc.
13
Operation
1. Basic Operation
Figure 12 shows the block diagram of the S-1167 Series.
The error amplifier compares the reference voltage (V
ref
) with V
fb
, which is the output voltage resistance-divided by
feedback resistors R
s
and R
f
. It supplies the output transistor with the gate voltage necessary to ensure a certain
output voltage free of any fluctuations of input voltage and temperature.
VOUT
*1
VSS
VIN
R
s
R
f
Error amplifier
Current supply
V
ref
V
fb
+
Reference voltage
circuit
*1. Parasitic diode
Figure 12
2. Output Transistor
The S-1167 Series uses a low on-resistance P-channel MOS FET as the output transistor.
Be sure that V
OUT
does not exceed V
IN
+ 0.3 V to prevent the voltage regulator from being damaged due to inverse
current flowing from the VOUT pin through a parasitic diode to the VIN pin.
ULTRA LOW CURRENT CONSUMPTION, HIGH RIPPLE REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1167 Series
Rev.3.0_00
Seiko Instruments Inc.
14
3. Shutdown Pin (ON / OFF Pin)
This pin starts and stops the regulator.
When the ON / OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-in P-
channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially reduce the
current consumption. The VOUT pin becomes the V
SS
level due to the internally divided resistance of several MΩ
between the VOUT pin and VSS pin.
The structure of the ON / OFF pin is as shown in Figure 13. Since the ON / OFF pin is neither pulled down nor
pulled up internally, do not use it in the floating state. In addition, note that the current consumption increases if a
voltage of 0.3 V to V
IN
0.3 V is applied to the ON / OFF pin. When the ON / OFF pin is not used, connect it to the
VSS pin if the product type is “A” and to the VIN pin if it is “B”.
Table 7
Product Type ON / OFF Pin Internal Circuit VOUT Pin Voltage Current Consumption
A “L” : Power on Operaing Set value I
SS1
A “H” : Power off Stopped V
SS
level I
SS2
B “L” : Power off Stopped V
SS
level I
SS2
B “H” : Power on Operaing Set value I
SS1
VSS
ON / OFF
VIN
Figure 13
ULTRA LOW CURRENT CONSUMPTION, HIGH RIPPLE REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.3.0_00
S-1167 Series
Seiko Instruments Inc.
15
Precautions
• Wiring patterns for the VIN pin, VOUT pin and GND pin should be designed so that the impedance is low. When
mounting an output capacitor between the VOUT pin and VSS pin (C
L
) and a capacitor for stabilizing the input between
VIN pin and VSS pin (C
IN
), the distance from the capacitors to these pins should be as short as possible.
• Note that the output voltage may increase when a series regulator is used at low load current (10 μA or less).
• Note that the output voltage may increase due to driver leakage when a series regulator is used at high temperatures.
• Generally a series regulator may cause oscillation, depending on the selection of external parts. The following
conditions are recommended for this IC. However, be sure to perform sufficient evaluation under the actual usage
conditions for selection, including evaluation of temperature characteristics.
Input capacitor (C
IN
) : 1.0 μF or more
Output capacitor (C
L
) : 1.0 μF or more
Equivalent series resistance (R
ESR
) : 1.0 Ω or less
• The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitor is small or
an input capacitor is not connected.
• It is important to sufficiently evaluate the output voltage fluctuation due to the power supply fluctuation and load
fluctuation characteristics in the actual equipment.
• If the power supply suddenly increases sharply, a momentary overshoot may be output. It is therefore important to
sufficiently evaluate the output voltage at power application in the actual equipment.
• The application conditions for the input voltage, output voltage, and load current should not exceed the package power
dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• In determining the output current, attention should be paid to the output current value specified in Table 6 in the “
Electrical Characteristics” and footnote *5 of the table.
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by products including
this IC of patents owned by a third party.

S-1167B18-I6T2U

Mfr. #:
Manufacturer:
ABLIC
Description:
LDO Voltage Regulators Linear LDO reg Hi 9A Iq 150mA Iout
Lifecycle:
New from this manufacturer.
Delivery:
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