P89LPC925FDHY Datasheet P89LPC924FDH,529, P89LPC925FDHY, P89LPC925FN,129 | P37-P39

Philips Semiconductors

P89LPC924/925

8-bit microcontrollers with accelerated two-clock 80C51 core

Product data Rev. 03 — 15 December 2004 37 of 49

9397 750 14471

Flash programming and erasing: There are four methods of erasing or

programming of the Flash memory that may be used. First, the Flash may be

programmed or erased in the end-user application by calling low-level routines

through a common entry point. Second, the on-chip ISP boot loader may be invoked.

This ISP boot loader will, in turn, call low-level routines through the same common

entry point that can be used by the end-user application. Third, the Flash may be

programmed or erased using the parallel method by using a commercially available

EPROM programmer which supports this device. Fourth, the Flash may be

programmed or erased using a commercially available EPROM programmer which

supports the ICP protocol. This device does not provide for direct veriﬁcation of code

memory contents. Instead this device provides a 32-bit CRC result on either a sector

or the entire 4 kB/8 kB of user code space.

Boot ROM: When the microcontroller programs its own Flash memory, all of the

low-level details are handled by code that is contained in a Boot ROM that is separate

from the Flash memory. A user program simply calls the common entry point in the

Boot ROM with appropriate parameters to accomplish the desired operation. The

Boot ROM include operations such as erase sector, erase page, program page, CRC,

program security bit, etc. The Boot ROM occupies the program memory space at the

top of the address space from FF00 to FFFF hex, thereby not conﬂicting with the user

program memory space.

Power-on reset code execution: The P89LPC924/925 contains two special Flash

elements: the Boot Vector and the Boot Status Bit. Following reset, the

P89LPC924/925 examines the contents of the Boot Status Bit. If the Boot Status Bit

is set to zero, power-up execution starts at location 0000H, which is the normal start

address of the user’s application code. When the Boot Status Bit is set to a one, the

contents of the Boot Vector is used as the high byte of the execution address and the

low byte is set to 00H. The factory default setting is 1FH for the P89LPC925 and

corresponds to the address 1F00H for the default ISP boot loader. The factory default

setting is 0FH for the P89LPC924 and corresponds to the address 0F00H for the

default ISP boot loader. This boot loader is pre-programmed at the factory into this

address space and can be erased by the user. Users who wish to use this loader

should take precautions to avoid erasing the 1 kB sector from 1C00H to 1FFFH

in the P89LPC925 or the 1 kB sector from 0C00H to 0FFFH in the P89LPC924.

Instead, the page erase function can be used to erase the eight 64-byte pages

which comprise the lower 512 bytes of the sector. A custom boot loader can be

written with the Boot Vector set to the custom boot loader, if desired.

Hardware activation of the boot loader: The boot loader can also be executed by

forcing the device into ISP mode during a power-on sequence (see the

P89LPC924/925 User’s Manual

for speciﬁc information). This has the same effect as

having a non-zero Boot Status Bit. This allows an application to be built that will

normally execute user code but can be manually forced into ISP operation. If the

factory default setting for the Boot Vector is changed, it will no longer point to the

factory pre-programmed ISP boot loader code. If this happens, the only way it is

possible to change the contents of the Boot Vector is through the parallel or ICP

programming methods, provided that the end user application does not contain a

customized loader that provides for erasing and reprogramming of the Boot Vector

and Boot Status Bit. After programming the Flash, the Boot Status Bit should be

programmed to zero in order to allow execution of the user’s application code

beginning at address 0000H.

Philips Semiconductors

P89LPC924/925

8-bit microcontrollers with accelerated two-clock 80C51 core

Product data Rev. 03 — 15 December 2004 38 of 49

9397 750 14471

In-System Programming (ISP): In-System Programming is performed without

removing the microcontroller from the system. The In-System Programming facility

consists of a series of internal hardware resources coupled with internal ﬁrmware to

facilitate remote programming of the P89LPC924/925 through the serial port. This

ﬁrmware is provided by Philips and embedded within each P89LPC924/925 device.

The Philips In-System Programming facility has made in-system programming in an

embedded application possible with a minimum of additional expense in components

and circuit board area. The ISP function uses ﬁve pins (V

, V

, TXD, RXD, and

RST). Only a small connector needs to be available to interface your application to an

external circuit in order to use this feature. Please see the

P89LPC924/925 User’s

Manual

for additional details.

In-Application Programming (IAP): Several In-Application Programming (IAP) calls

are available for use by an application program to permit selective erasing and

programming of Flash sectors, pages, security bits, conﬁguration bytes, and device

identiﬁcation. All calls are made through a common interface, PGM_MTP. The

programming functions are selected by setting up the microcontroller’s registers

before making a call to PGM_MTP at FF03H. Please see the

P89LPC924/925 User’s

Manual

for additional details.

In-Circuit Programming (ICP): In-Circuit Programming is a method intended to

allow commercial programmers to program and erase these devices without

removing the microcontroller from the system. The In-Circuit Programming facility

consists of a series of internal hardware resources to facilitate remote programming

of the P89LPC924/925 through a two-wire serial interface. Philips has made in-circuit

programming in an embedded application possible with a minimum of additional

expense in components and circuit board area. The ICP function uses ﬁve pins (V

, P0.5, P0.4, and RST). Only a small connector needs to be available to interface

your application to an external programmer in order to use this feature.

8.26 User conﬁguration bytes

A number of user-conﬁgurable features of the P89LPC924/925 must be deﬁned at

power-up and therefore cannot be set by the program after start of execution. These

features are conﬁgured through the use of the Flash byte UCFG1. Please see the

P89LPC924/925 User’s Manual

for additional details.

8.27 User sector security bytes

There are four or eight User Sector Security Bytes, depending on the device, each

corresponding to one sector. Please see the

P89LPC924/925 User’s Manual

for

additional details.

Philips Semiconductors

P89LPC924/925

8-bit microcontrollers with accelerated two-clock 80C51 core

Product data Rev. 03 — 15 December 2004 39 of 49

9397 750 14471

9. Limiting values

[1] The following applies to Limiting values:

a) Stresses above those listed under Tabl e 7 may cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any conditions other than those described in Table 8 “DC electrical characteristics”, Table 9 “AC

characteristics” and Table 10 “AC characteristics” of this speciﬁcation are not implied.

b) This product includes circuitry speciﬁcally designed for the protection of its internal devices from the damaging effects of excessive

static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.

c) Parameters are valid over operating temperature range unless otherwise speciﬁed. All voltages are with respect to V

unless

otherwise noted.

Table 7: Limiting values

[1]

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

amb(bias)

operating bias ambient temperature −55 +125 °C

stg

storage temperature range −65 +150 °C

xtal

voltage on XTAL1, XTAL2 pin to V

-V

+ 0.5 V

voltage on any other pin to V

−0.5 +5.5 V

OH(I/O)

HIGH-level output current per I/O pin - 8 mA

OL(I/O)

LOW-level output current per I/O pin - 20 mA

I/O(tot)(max)

maximum total I/O current - 80 mA

tot(pack)

total power dissipation per package based on package heat

transfer, not device power

consumption

- 1.5 W

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P89LPC925FDHY

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IC MCU 8BIT 8KB FLASH 20TSSOP

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