OP249 Data Sheet
Rev. I | Page 12 of 18
80
20
0
40
60
TEMPERATURE (°C)
–75 –50 –25 0 25 50 75 100 125
INPUT OFFSET CURRENT (pA)
T
A
= 25°C
V
CM
= 0V
00296-036
Figure 36. Input Offset Current vs. Temperature
12000
4000
2000
0
6000
8000
10000
TEMPERATURE (°C)
–75 –50 –25 0 25 50 75 100 125
OPEN-LOOP GAIN (V/mV)
V
S
= ±15V
R
L
= 10kΩ
R
L
= 2kΩ
00296-037
Figure 37. Open-Loop Gain vs. Temperature
80
20
0
40
60
SINK
SHORT-CIRCUIT OUTPUT CURRENT (mA)
V
S
= ±15V
TEMPERATURE (°C)
–75 –50 –25 0 25 50 75 100
125
SOURCE
00296-038
Figure 38. Short-Circuit Output Current vs. Junction Temperature
Data Sheet OP249
Rev. I | Page 13 of 18
APPLICATIONS INFORMATION
+IN
V+
V
OUT
V–
–IN
00296-039
Figure 39. Simplified Schematic (1/2 OP249)
+3V
+18V
+3V
5kΩ
5kΩ
1/2
OP249
1/2
OP249
2
1
3
6
5
4
8
7
–18V
00296-040
Figure 40. Burn-In Circuit
The OP249 represents a reliable JFET amplifier design,
featuring an excellent combination of dc precision and high
speed. A rugged output stage provides the ability to drive a
600 Ω load and still maintain a clean ac response. The OP249
features a large signal response that is more linear and symmetric
than previously available JFET input amplifiers. Figure 41
compares the large signal response of the OP249 to other
industry-standard dual JFET amplifiers.
Typically, the slewing performance of the JFET amplifier is
specified as a number of V/µs. There is no discussion on the
quality, that is, linearity and symmetry of the slewing response.
10
0%
100
90
A) OP249
10
0%
100
90
B) LT1057
1µs
5V
1µs
5V
00296-041
Figure 41. Large-Signal Transient Response,
A
V
= 1, V
IN
= 20 V p-p, Z
L
= 2 kΩ//200 pF, V
S
= ±15 V
The OP249 was carefully designed to provide symmetrically
matched slew characteristics in both the negative and positive
directions, even when driving a large output load.
The slewing limitation of the amplifier determines the maximum
frequency at which a sinusoidal output can be obtained without
significant distortion. However, it is important to note that the
nonsymmetric slewing typical of previously available JFET
amplifiers adds a higher series of harmonic energy content to
the resulting responseand an additional dc output component.
Examples of potential problems of nonsymmetric slewing behavior
can be in audio amplifier applications, where a natural low dis-
tortion sound quality is desired and in servo or signal processing
systems where a net dc offset cannot be tolerated. The linear
and symmetric slewing feature of the OP249 makes it an ideal
choice for applications that exceed the full power bandwidth
range of the amplifier.
OP249 Data Sheet
Rev. I | Page 14 of 18
10
0%
100
90
50mV
1µs
00296-042
Figure 42. Small-Signal Transient Response,
A
V
= 1, Z
L
= 2 kΩ||100 pF, No Compensation, V
S
= ±15 V
As with most JFET input amplifiers, the output of the OP249
can undergo phase inversion if either input exceeds the specified
input voltage range. Phase inversion does not damage the
amplifier, nor does it cause an internal latch-up condition.
Supply decoupling should be used to overcome inductance and
resistance associated with supply lines to the amplifier. A 0.1 µF
and a 10 µF capacitor should be placed between each supply pin
and ground.
OPEN-LOOP GAIN LINEARITY
The OP249 has both an extremely high open-loop gain of
1 kV/mV minimum and constant gain linearity, which enhances its
dc precision and provides superb accuracy in high closed-loop
gain applications. Figure 43 illustrates the typical open-loop
gain linearityhigh gain accuracy is assured, even when
driving a 600 Ω load.
OFFSET VOLTAGE ADJUSTMENT
The inherent low offset voltage of the OP249 makes offset
adjustments unnecessary in most applications. However, where
a lower offset error is required, balancing can be performed
with simple external circuitry, as shown in Figure 44 and Figure 45.
HORIZONTAL 5V/DIV
OUTPUT CHARGE
VERTICAL 50µV/DIV
INPUT VARIATION
00296-043
Figure 43. Open-Loop Gain Linearity; Variation in Open-Loop Gain Results in
Errors in High Closed-Loop Gain Circuits; R
L
= 600 Ω, V
S
= ±15 V
+V
R3
R4
R2
R1
V
OS
ADJUST RANGE = ±V
V
OUT
V
IN
–V
1/2
OP249
R2
31Ω
R5
50kΩ
R1
200kΩ
00296-044
Figure 44. Offset Adjustment for Inverting Amplifier Configuration
+V
R5
V
OS
ADJUST RANGE = ±V
R2
R1
1 +
R5
R4
IF R2 << R4
R5
R4 + R2
R4
V
OUT
–V
V
IN
R3
50kΩ
R2
33Ω
R1
200kΩ
1/2
OP249
GAIN =
= 1 +
V
OUT
V
IN
=
00296-045
Figure 45. Offset Adjustment for Noninverting Amplifier Configuration
In Figure 44, the offset adjustment is made by supplying a small
voltage at the noninverting input of the amplifier. Resistors R1
and R2 attenuate the potentiometer voltage, providing a ±2.5 mV
(with V
S
= ±15 V) adjustment range, referred to the input.
Figure 45 shows the offset adjustment for the noninverting
amplifier configuration, also providing a ±2.5 mV adjustment
range. As shown in the equations in Figure 45, if R4 is not much
greater than R2, a resulting closed-loop gain error must be
accounted for.
SETTLING TIME
The settling time is the time between when the input signal begins
to change and when the output permanently enters a prescribed
error band. The error bands on the output are 5 mV and 0.5 m V,
respectively, for 0.1% and 0.01% accuracy.
Figure 46 shows the settling time of the OP249, which is typically
870 ns. Moreover, problems in settling response, such as thermal
tails and long-term ringing, are nonexistent.
10
0%
100
90
500ns10mV
870ns
00296-046
Figure 46. Settling Characteristics of the OP249 to 0.01%

OP249GS

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers DUAL PREC JFET IC High Speed
Lifecycle:
New from this manufacturer.
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