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PCA9605D,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
PCA9605 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 February 2011 10 of 22
NXP Semiconductors
PCA9605
Simple 2-wire bus buffer
10. Application information
10.1 Design considerations
Figure 13 shows a typical data transfer through the PCA9605. The PCA9605 has
excellent application to extending loads and providing interfaces to connectors on high
speed microprocessor cards. PCA9605 can operate well in excess of the Fast-mode
400 kHz I
2
C-bus specification (Ref. 1), and is compatible with the Fast-mode Plus
specification. Rise times are determined simply by the side of the buffer with the slowest
RC time constant.
Figure 14 shows a typical application for the PCA9605. In most applications there will be a
single master on the Sxx_IN side of the buffer. One or more PCA9605s can be connected
to this master, giving multiple isolated bus sections on which the slaves are located. Each
bus section can have the maximum permissible load capacitance, and this capacitance
will not influence any other bus section.
The master can control the enable (EN) signals such that each bus section can be
independently activated. This allows for slaves sharing the same address to be placed on
different bus sections and thus uniquely addressed.
The enable pin (EN) can similarly be used to interface buses of different operating
frequencies. When certain bus sections are enabled, the system frequency may be limited
by a bus section having a slave device specified only to 400 kHz (Fast-mode). When that
bus section is disabled, the slow slave is isolated and the remaining bus can be run at
1 MHz (Fast-mode Plus).
Remark: Input to output delay exaggerated for clarity.
Fig 13. Typical communication sequence through the PCA9605
PCA9605 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 February 2011 11 of 22
NXP Semiconductors
PCA9605
Simple 2-wire bus buffer
Figure 15 shows the PCA9605 used with masters on both sides of the buffer. More than
one master may be used on the Sxx_IN side of the IC. However, to locate a master on the
Sxx_OUT side and have that master be able to communicate with devices on the Sxx_IN
side, it must either have direct control over the direction pin (DIR) of the PCA9605, or it
must request another controlling master to change the direction. In Figure 15
, U4 uses an
IRQ to signal to U2 that requests a direction change. Once in control, it could alternatively
use the bus to signal ‘release of control’.
Fig 14. PCA9605 typical buffer application
002aaf342
BUS MASTER
U3
V
DD
SCL
SDA
R4
1.1 kΩ
SCL
SDA
SCL_IN
SDA_IN
PCA9525
V
DD
SCL_OUT
SDA_OUT
U1
EN
DIR
3.3 V
SCL
SDA
V
DD
MASTER/
SLAVE
U4
SCL
SDA
V
DD
SLAVE
U5
SCL
SDA
V
DD
SLAVE
U6
R3
1.1 kΩ
R1
1.1 kΩ
R2
1.1 kΩ
R4
110 Ω
SCL
SDA
SCL_IN
SDA_IN
PCA9605
V
DD
SCL_OUT
SDA_OUT
U2
EN
DIR
SCL
SDA
V
DD
SLAVE
U7
SCL
SDA
V
DD
SLAVE
U8
R5
110 Ω
up to 400 pF load
(PCA9525)
or 4 nF load if only
PCA9605's used
(R1 and R2 = 110 Ω)
up to 400 pF load (PCA9525)
up to 4 nF load (PCA9605)
PCA9605 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 February 2011 12 of 22
NXP Semiconductors
PCA9605
Simple 2-wire bus buffer
Multiplexers such as the PCA9544A are simple analog switches which provide no
capacitive load isolation between connected branches. Figure 16
shows the PCA9605
enhancing an I
2
C-bus multiplexer application by isolating the load capacitance of each
branch. Figure 17
and Figure 18 show alternate forms of bus multiplexing, with the latter
being an excellent way to eliminate the requirement for a master to dedicate pins to
enabling multiple PCA9605 devices.
Fig 15. PCA9605 with masters on both sides of buffer
Fig 16. PCA9605 multiplexer isolation application
002aaf361
BUS MASTER
U2
V
DD
SCL
SDA
R1 R2 R3 R4
SCL
SDA
SCL_IN
SDA_IN
PCA9605
V
DD
SCL_OUT
SDA_OUT
U1
EN
DIR
5 V
IRQ
SCL
SDA
V
DD
MASTER/
SLAVE
U3
SCL
SDA
V
DD
MASTER
U4
SCL
SDA
V
DD
SLAVE
U5
master U4 requests SCL
direction change from
master U2 using IRQ
002aaf362
BUS MASTER
U1
V
CC
SCL
SDA
R1
1.5 kΩ
R2
1.5 kΩ
R3
1.1 kΩ
R4
1.1 kΩ
3.3 V
SCL
SDA
PCA9544A
V
DD
SC0
SD0
U3
INT[3:0]
A0
A1
A2
SC1
SD1
SC2
SD2
SC3
SD3
Using the PCA9525,
up to 400 pF may be
connected to each
and every bus 0
through bus 3.
SCL_IN
SDA_IN
PCA9605
V
DD
SCL_OUT
SDA_OUT
U2
EN
DIR
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PCA9605D,118

Mfr. #:
Buy PCA9605D,118
Manufacturer:
NXP Semiconductors
Description:
IC REDRIVER I2C 1CH 400KHZ 8SO
Lifecycle:
New from this manufacturer.
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