PCA9605 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 February 2011 7 of 22
NXP Semiconductors
PCA9605
Simple 2-wire bus buffer
9.1 Bidirectional data buffer
The bidirectional data buffer will determine which side has first fallen below V
lock
and give
that side of the buffer control over the direction of the buffer. For the purpose of this one
LOW-going pulse, that side now becomes the ‘input’ (be it SDA_IN or SDA_OUT).
When the ‘input’ side falls to near V
IL
, it will begin to drive the ‘output’ side of the buffer
LOW. It will continue to hold the ‘output’ low until the ‘input’ exceeds V
IH
at which point the
‘output’ is released and will rise as fast as it is permitted by the load and pull-up to which it
is attached. (Assuming, of course, that the ‘output’ is not otherwise held LOW by some
other device on the bus on that side of the buffer.)
When the ‘input’ side again exceeds V
unlock
, it will release its control of the buffer direction.
At this point, if the ‘output’ side was being held LOW (< V
unlock
) by another device, it will
immediately gain control and now become the ‘input’. What was the ‘input’ will now
become the ‘output’, and the process will repeat as above, but in the opposite direction.
T
amb
=25C
Fig 5. Typical input levels versus supply voltage Fig 6. Typical V
IH
V
IL
hysteresis versus supply
voltage
T
amb
=25CI
OL
=30mA
Fig 7. Typical LOW-level output voltage versus
pull-up resistance
Fig 8. Typical LOW-level output voltage versus
ambient temperature
2
3
1
4
5
V
I
(V)
0
V
DD
(V)
26534
002aaf333
V
lock
V
IH
V
IL
400
600
200
800
1000
V
I(hys)
(V)
0
V
DD
(V)
26534
002aaf334
T
amb
= +85 °C
+25 °C
−40 °C
40
60
20
80
100
V
OL
(mV)
0
R
PU
(kΩ)
0 2.52.01.0 1.50.5
002aaf359
V
DD
= 5.5 V
2.7 V
100
200
300
V
OL
(mV)
0
T
amb
(C)
−50 150100050
002aaf360
V
DD
= 5.5 V
2.7 V
