LT5560
17
5560f
Table 3 lists actual component values used on the LT5560
evaluation boards for impedance matching at various
frequencies. The measured Input Return Loss vs Fre-
quency performance is plotted for several of the cases
in Figure 6.
Figure 6. Input Return Loss vs Frequency
for Different Matching Values
Table 3. Component Values for Input Matching
CASE
FREQ.
(MHz)
T1
C1
(pF)
L1, L2
(nH)
MATCH BW
(@12dB RL)
1 10 WBC1-1TL 1:1 220 180 6-18
2 70 WBC1-1TL 1:1 39 33 29-102
3 140 WBC1-1TL 1:1 22 18 50-190
4 240 WBC1-1TL 1:1 15 12 115-295
5 450
1
WBC1-1TL 1:1 NA 0 390-560
6 900 HHM1522B1 1:1 2.2 0 710-1630
7 1900 HHM1526 2:1 1 0 1660-2500
8 2450 HHM1520A2 2:1 1 0 1640-2580
9 3600 HHM1583B1 2:1 0.5 0 3330-3840
Note 1: Series 5.6pF capacitor is used at the input (see Figure 3).
LO Input Port
Figure 7 shows a simplifi ed schematic of the LO input. The
LO input connections drive the bases of the mixer transis-
tors, while a 200Ω resistor across the inputs provides the
impedance termination. The internal 1kΩ bias resistors are
in parallel with the input resistor resulting in a net input
DC resistance of approximately 180Ω. The pins are biased
by an internally generated voltage at approximately
1V below V
CC
; thus external DC blocking capacitors are
required. If desired, the LO inputs can be driven differen-
tially. The required LO drive at the IC is 240mV
RMS
(typ)
which can come from a 50Ω source or a higher impedance
such as PECL.
Figure 7. LO Input Schematic
LO
+
LO
–
C3
C5
L5
LT5560
1k 1k
200Ω
C4C7
8
1
V
CC
LO
IN
50Ω
V
BIAS
5560 F07
FREQUENCY (MHz)
10
–30
RETURN LOSS (dB)
–10
–5
0
100 1000 4000
5560 F06
–15
–20
–25
1
2
3
4
5
6
7
9
