LT5560
19
5560f
APPLICATIO S I FOR ATIO
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Signal Output Port
A simplifi ed schematic of the output circuit is shown in
Figure 9. The output pins, OUT
+
and OUT
, are internally
connected to the collectors of the mixer transistors. These
pins must be biased at the supply voltage, which can be
applied through a transformer center-tap, impedance
matching inductors, RF chokes, or pull-up resistors. With
external resistor R1 = 3Ω (Figures 1 to 3), each OUT pin
draws about 4.5mA of supply current. For optimum per-
formance, these differential outputs should be combined
externally through a transformer or balun.
An equivalent small-signal model for the output is shown
in Figure 10. The output impedance can be modeled as
a 1.2kΩ resistor in parallel with a 0.7pF capacitor. For
low frequency applications, the 0.7nH series bond-wire
inductances can be ignored.
The external components, C2, L3 and L4, form a lowpass
impedance transformation network to match the mixer
output impedance to the input impedance of transformer
T2. The values for these components can be estimated
Figure 9. Output Port Schematic Figure 10. Output Port Small-Signal Model
with External Matching
OUT
+
OUT
0.7pF
LT5560
1.2k
V
CC
5560 F09
6
5
using the impedance parameters listed in Table 6 along
with similar equations as used for the input matching net-
work. As an example, at an output frequency of 140MHz
and R
L
= 200Ω (using a 4:1 transformer for T2),
n == =
R
R
S
L
1082
200
541.
Q =−
()
=n 1210.
X
R
Q
C
S
==515
C
X
pF
C
==
1
221
ω
.
C2 = C – C
INT
= 1.51pF
X
L
= R
L
Q = 420Ω
LL
X
nH
L
34
2
239== =
ω
OUT
LT5560
C2 C10
0.7nH
0.7nH
L3
L4
T2
V
CC
6
5
5560 F10
OUT
+
OUT
C
INT
0.7pF
R
INT
1.2k
LT5560
20
5560f
FREQUENCY (MHz)
0 500 1000 2000
–30
RETURN LOSS (dB)
–10
–5
0
1500 2500
5560 F11
–15
–20
–25
7
3
4
6
8
APPLICATIO S I FOR ATIO
WUU
U
In cases where the calculated value of C2 is less than the
internal output capacitance, capacitor C10 can be used to
improve the impedance match.
Figure 11. Output Return Loss vs Frequency
for Different Matching Values
Table 7 lists actual component values used on the
LT5560 evaluation boards for impedance matching at
several frequencies. The measured output return loss
vs frequency performance is plotted for several of the
cases in Figure 11.
Table 6. Output Port Differential Impedance (Parallel Equivalent)
FREQUENCY
(MHz)
OUTPUT
IMPEDANCE
(Ω)
REFLECTION COEFFICIENT (Z
O
= 50Ω)
MAG ANGLE (DEG.)
70 1098 || –j3185 0.913 –1.8
140 1082 || –j1600 0.912 –3.6
240 1082 || –j974 0.912 –5.9
360 1093 || –j646 0.913 –8.9
450 1083 || –j522 0.913 –11.0
750 1037 || –j320 0.910 –17.8
900 946 || –j269 0.903 –21.1
1500 655 || –j162 0.870 –34.5
1900 592 || –j122 0.865 –44.6
2150 662 || –j108 0.883 –50.0
2450 612 || –j95.7 0.879 –55.4
3600 188 || –j53.1 0.756 –88.7
Table 7. Component Values for Output Matching
CASE
FREQ.
(MHz)
T2
C2
(pF)
L3, L4
(nH)
C10
(pF)
MATCH
BW
(@12dB RL)
1 10 WBC16-1TL 16:1 - 0 - 3-60
2 70 WBC16-1TL 16:1 - 0 -
1
3-60
3 140 MABAES0061
4:1
1.5 220 - 110-170
4 240 MABAES0061
4:1
0.5 120 - 175-300
5 380 MABAES0061
4:1
- 68 - 290-490
6 450 MABAES0061
4:1
- 68 1.5 360-540
7 900 HHM1515B2 4:1 - 27 2.2 850-940
8 1900 HHM1525 1:1 - 3.9 1 1820-2000
Note 1: A better 70MHz match can be realized by adding a shunt 180nH
inductor at the C10 location.
LT5560
21
5560f
R1 ()
0
4
SUPPLY CURRENT (mA)
6
8
10
5
10
15 20
5560 F13
25
12
14
5
7
9
11
13
30
T
A
= 25°C
V
CC
= 3V
SUPPLY CURRENT (mA)
4
GAIN AND NF (dB), IIP3 (dBm)
4
6
8
10
14
5560 F14
2
0
–2
68 12
10
12
14
SSB NF
IIP3
GAIN
T
A
= 25°C
V
CC
= 3V
f
LO
= 760MHz
f
IF
= 140MHz
P
LO
= –2dBm
SUPPLY CURRENT (mA)
4
GAIN AND NF (dB), IIP3 (dBm)
4
6
8
10
14
5560 F15
2
0
–2
68 12
10
12
14
SSB NF
IIP3
GAIN
MEASURED WITH InF CAP ACROSS R1
T
A
= 25°C
V
CC
= 3V
f
LO
= 760MHz
f
IF
= 140MHz
P
LO
= –2dBm
APPLICATIO S I FOR ATIO
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Figure 12. Enable Input Circuit
Enable Interface
Figure 12 shows a simplifi ed schematic of the EN pin
interface. The voltage necessary to turn on the LT5560 is
2V. To disable the chip, the enable voltage must be less
than 0.3V. If the EN pin is allowed to fl oat, the chip will tend
to remain in its last operating state, thus it is not recom-
mended that the enable function be used in this manner.
If the shutdown function is not required, then the EN pin
should be connected directly to V
CC
.
The voltage at the EN pin should never exceed the power
supply voltage (V
CC
) by more than 0.3V. If this should
occur, the supply current could be sourced through the
EN pin ESD diode, potentially damaging the IC.
Figure 13. Typical Supply Current vs R1 Value
Figure 14. 900MHz Upconverting Mixer Gain,
Noise Figure and IIP3 vs Supply Current
Figure 15. 900MHz Downconverting Mixer Gain,
Noise Figure and IIP3 vs Supply Current
Adjustable Supply Current
The LT5560 offers a direct trade-off between power sup-
ply current and linearity. This capability allows the user
to optimize the performance and power dissipation of
the mixer for a particular application. The supply current
can be adjusted by changing the value of resistor R1 at
the center-tap of the input balun. For downconversion
applications, a bypass capacitor in parallel with R1 may
be desired to minimize noise fi gure. The bypass capacitor
has a greater effect on noise fi gure at larger values of R1.
In upmixer confi gurations, adding a capacitor across R1
has little effect.
Figure 13 shows the supply current as a function of R1.
Note that the current will also be affected by parasitic
resistance in the matching components. Figure 14 il-
lustrates the effect of supply current on Gain, IIP3 and
NF of a 900MHz upconverting mixer. The performance
LT5560
60k
EN
V
CC
5560 F12
2
vs current of a 900MHz downconverting mixer is plotted
in Figure 15. In this example, a 1nF capacitor has been
placed in parallel to R1 for best noise fi gure.

LT5560EDD#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RF Mixer 0.01MHz to 4GHz L Pwr Active Mixer
Lifecycle:
New from this manufacturer.
Delivery:
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