NCV7351, NCV7351F
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4
APPLICATION INFORMATION
NCV7351
S
RxD
TxD
1
4
Micro
controller
GND
VBAT
5 V−reg
GND
2
5
8
CANH
CANL
3
6
7
CAN
BUS
.
3 V−reg
RB20120808
Figure 2. NCV7351−3 Application Diagram
R
LT
= 60 W
R
LT
= 60 W
V
CC
V
IO
NCV7351
S
RxD
TxD
1
4
Micro
controller
GND
VBAT
5 V−reg
GND
2
5
8
CANH
CANL
3
6
7
CAN
BUS
.
EN
RB20120808
Figure 3. NCV7351−E Application diagram
V
CC
R
LT
= 60 W
R
LT
= 60 W
NCV7351, NCV7351F
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5
FUNCTIONAL DESCRIPTION
NCV7351 has three versions which differ from each other
only by function of pin 5. (See also Table 2) Devices marked
with F (NCV7351F) are devices compliant to CAN flexible
data rate timing specifications as detailed in electrical
characteristics section. Except fulfilling these extra CAN
FD requirements, all remaining specifications are equal to
other devices from NCV7351 family. E.g. all specifications
valid for NCV7351−3 versions are also valid for
NCV7351F−3 version.
NCV7351−3: Pin 5 is V
IO
pin, which is supply pin for
transceiver digital inputs/output (supplying pins TxD, RxD,
S, EN). The V
IO
pin should be connected to microcontroller
supply pin. By using V
IO
supply pin shared with
microcontroller the I/O levels between microcontroller and
transceiver are properly adjusted. This allows in
applications with microcontroller supply down to 3 V to
easy communicate with the transceiver. (See Figure 2)
NCV7351−0: Pin 5 is not connected. This version is full
replacement of the previous generation CAN transceiver
AMIS30660.
NCV7351−E: Pin 5 is digital enable pin which allows
transceiver to be switched off with very low supply current.
OPERATING MODES
The NCV7351 modes of operation are provided as
illustrated in Table 3. These modes are selectable through
pin S and also EN in case of NCV7351−E.
Table 3. OPERATING MODES
Mode Pin S Pin EN (Note 1) Pin TxD CANH,L Pins RxD
Normal
0 1 0 Dominant 0
0 1 1 Recessive 1
Silent
1 1 X Recessive 1
1 1 X Dominant (Note 3) 0
Off (Note 1) X 0 X floating floating
1. Only applicable to NCV7351−E
2. ‘X’ = don’t care
3. CAN bus driven to dominant by another transceiver on the bus
Normal Mode
In the normal mode, the transceiver is able to
communicate via the bus lines. The signals are transmitted
and received to the CAN controller via the pins TxD and
RxD. The slopes on the bus lines outputs are optimized to
give low EME.
Silent Mode
In the silent mode, the transmitter is disabled. The bus pins
are in recessive state independent of TxD input. Transceiver
listens to the bus and provides data to controller, but
controller is prevented from sending any data to the bus.
Off Mode
In Off mode, complete transceiver is disabled and
consumes very low current. The CAN pins are floating not
loading the CAN bus.
Over−temperature Detection
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 180°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC is reduced. All other
IC functions continue to operate. The transmitter off−state
resets when the temperature decreases below the shutdown
threshold and pin TxD goes high. The thermal protection
circuit is particularly needed in case of the bus line short
circuits.
TxD Dominant Time−out Function
A TxD dominant time−out timer circuit prevents the bus
lines being driven to a permanent dominant state (blocking
all network communication) if pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the low−level on pin TxD exceeds the
internal timer value t
dom
, the transmitter is disabled, driving
the bus into a recessive state. The timer is reset by a positive
edge on pin TxD. This TxD dominant time−out time
(t
dom(TxD)
) defines the minimum possible bit rate to
12 kbps.
Fail Safe Features
A current−limiting circuit protects the transmitter output
stage from damage caused by accidental short circuit to
either positive or negative supply voltage, although power
dissipation increases during this fault condition.
The pins CANH and CANL are protected from
automotive electrical transients (according to ISO 7637;
Figure 4). Internally, pin TxD is pulled high, pin EN and S
low should the input become disconnected. Pins TxD, S, EN
and RxD will be floating, preventing reverse supply should
the V
CC
supply be removed.
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6
Definitions: All voltages are referenced to GND (pin 2). Positive currents flow into the IC. Sinking current means the current
is flowing into the pin; sourcing current means the current is flowing out of the pin.
Table 4. ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Conditions Min Max Unit
V
sup
Supply voltage V
CC
−0.3 +6 V
V
CANH
DC voltage at pin CANH 0 < V
CC
< 5.5 V; no time limit −50 +50 V
V
CANL
DC voltage at pin CANL 0 < V
CC
< 5.5 V; no time limit −50 +50 V
V
IOs
DC voltage at pin TxD, RxD, S, EN, V
IO
Notes 4 and 5 −0.3 +6 V
V
esd
Electrostatic discharge voltage at all pins
according to EIA−JESD22
Note 6 −6 +6 kV
Electrostatic discharge voltage at
CANH,CANL, pins according to
EIA−JESD22
Note 6 −8 +8 kV
Electrostatic discharge voltage at CANH,
CANL pins According to IEC 61000−4−2
Note 7 −15 +15 kV
Standardized charged device model ESD
pulses according to ESD−STM5.3.1−1999
−750 +750 V
V
schaff
Transient voltage at CANH, CANL pins,
See Figure 4
Note 8 −150 +100 V
Latch−up Static latch−up at all pins Note 9 +150 mA
T
stg
Storage temperature −55 +150 °C
T
J
Maximum junction temperature −40 +170 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. EN pin Only available on NCV7351−E version
5. V
IO
pin Only available on NCV7351−3 version
6. Standardized human body model electrostatic discharge (ESD) pulses in accordance to EIA−JESD22. Equivalent to discharging a 100 pF
capacitor through a 1.5 kW resistor.
7. System human body model electrostatic discharge (ESD) pulses. Equivalent to discharging a 150 pF capacitor through a 330 W resistor
referenced to GND. Verified by external test house
8. Pulses 1, 2a,3a and 3b according to ISO 7637 part 3. Results were verified by external test house.
9. Static latch−up immunity: Static latch−up protection level when tested according to EIA/JESD78.
Table 5. THERMAL CHARACTERISTICS
Symbol Parameter Conditions Value Unit
R
q
JA_1
Thermal Resistance Junction−to−Air, 1S0P PCB (Note 10) Free air 125 K/W
R
q
JA_2
Thermal Resistance Junction−to−Air, 2S2P PCB (Note 11) Free air 75 K/W
10.Test board according to EIA/JEDEC Standard JESD51−3, signal layer with 10% trace coverage.
11. Test board according to EIA/JEDEC Standard JESD51−7, signal layers with 10% trace coverage.

NCV7351D10R2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
CAN Interface IC High Spd Lo Pwr CAN Transceiver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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