10
LTC1435A
APPLICATIONS INFORMATION
WUU
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C
IN
and C
OUT
Selection
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle V
OUT
/
V
IN
. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
C required
IN
II
VVV
V
RMS MAX
OUT IN OUT
IN
()
[]
12/
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capaci-
tor or to choose a capacitor rated at a higher temperature
than required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the manufacturer if there is any question.
The selection of C
OUT
is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment is satisfied the capacitance is adequate for filtering.
The output ripple (V
OUT
) is approximated by:
∆∆V I ESR
fC
OUT L
OUT
≈+
1
4
where f = operating frequency, C
OUT
= output capacitance
and I
L
= ripple current in the inductor. The output ripple
is highest at maximum input voltage since I
L
increases
with input voltage. With I
L
= 0.4I
OUT(MAX)
the output ripple
will be less than 100mV at max V
IN
assuming:
C
OUT
required ESR < 2R
SENSE
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance through-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR(size)
product of any aluminum electrolytic at a somewhat
higher price. Once the ESR requirement for C
OUT
has been
met, the RMS current rating generally far exceeds the
I
RIPPLE(P-P)
requirement.
In surface mount applications multiple capacitors may have
to be paralleled to meet the ESR or RMS current handling
requirements of the application. Aluminum electrolytic and
dry tantalum capacitors are both available in surface mount
configurations. In the case of tantalum, it is critical that the
capacitors are surge tested for use in switching power
supplies. An excellent choice is the AVX TPS series of
surface mount tantalum, available in case heights ranging
from 2mm to 4mm. Other capacitor types include Sanyo
OS-CON, Nichicon PL series and Sprague 593D and 595D
series. Consult the manufacturer for other specific recom-
mendations.
INTV
CC
Regulator
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC1435A. The INTV
CC
pin can supply up to
15mA and must be bypassed to ground with a minimum
of 2.2µF tantalum or low ESR electrolytic. Good bypassing
is necessary to supply the high transient currents required
by the MOSFET gate drivers.
High input voltage applications, in which large MOSFETs
are being driven at high frequencies, may cause the maxi-
mum junction temperature rating for the LTC1435A to be
exceeded. The IC supply current is dominated by the gate
charge supply current when not using an output derived
EXTV
CC
source. The gate charge is dependent on operat-
ing frequency as discussed in the Efficiency Considerations
section. The junction temperature can be estimated by using
the equations given in Note 1 of the Electrical Character-
istics. For example, the LTC1435A is limited to less than
17mA from a 30V supply:
T
J
= 70°C + (17mA)(30V)(100°C/W) = 126°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked when
operating in continuous mode at maximum V
IN
.
EXTV
CC
Connection
The LTC1435A contains an internal P-channel MOSFET
switch connected between the EXTV
CC
and INTV
CC
pins. The
switch closes and supplies the INTV
CC
power whenever the
EXTV
CC
pin is above 4.8V, and remains closed until EXTV
CC
drops below 4.5V. This allows the MOSFET driver and
11
LTC1435A
APPLICATIONS INFORMATION
WUU
U
control power to be derived from the output during normal
operation (4.8V < V
OUT
< 9V) and from the internal regu-
lator when the output is out of regulation (start-up, short
circuit). Do not apply greater than 10V to the EXTV
CC
pin
and ensure that EXTV
CC
< V
IN
.
Significant efficiency gains can be realized by powering
INTV
CC
from the output, since the V
IN
current resulting from
the driver and control currents will be scaled by a factor of
Duty Cycle/Efficiency. For 5V regulators this supply means
connecting the EXTV
CC
pin directly to V
OUT
. However, for
3.3V and other lower voltage regulators, additional circuitry
is required to derive INTV
CC
power from the output.
The following list summarizes the four possible connections
for EXTV
CC:
1. EXTV
CC
left open (or grounded). This will cause INTV
CC
to be powered from the internal 5V regulator resulting
in an efficiency penalty of up to 10% at high input volt-
ages.
2. EXTV
CC
connected directly to V
OUT
. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
3. EXTV
CC
connected to an output-derived boost network.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTV
CC
to an
output-derived voltage which has been boosted to
greater than 4.8V. This can be done with either the in-
ductive boost winding as shown in Figure 4a or the
capacitive charge pump shown in Figure 4b. The charge
pump has the advantage of simple magnetics.
4. EXTV
CC
connected to an external supply. If an external
supply is available in the 5V to 10V range (EXTV
CC
V
IN
),
it may be used to power EXTV
CC
providing it is compat-
ible with the MOSFET gate drive requirements. When
driving standard threshold MOSFETs, the external sup-
ply must always be present during operation to prevent
MOSFET failure due to insufficient gate drive.
Topside MOSFET Driver Supply (C
B
, D
B
)
An external bootstrap capacitor C
B
connected to the Boost
pin supplies the gate drive voltage for the topside MOSFET.
Capacitor C
B
in the Functional Diagram is charged through
diode D
B
from INTV
CC
when the SW pin is low. When the
Figure 4a. Secondary Output Loop and EXTV
CC
Connection
EXTV
CC
V
IN
TG
BG
PGND
LTC1435A
N-CH
N-CH
+
C
IN
V
IN
+
C
OUT
L1
R
SENSE
V
OUT
+
1µF
1435A F04b
VN2222LL
BAT85
BAT85
BAT85
0.22µF
SW
Figure 4b. Capacitive Charge Pump for EXTV
CC
topside MOSFET is to be turned on, the driver places the
C
B
voltage across the gate source of the MOSFET. This en-
hances the MOSFET and turns on the topside switch. The
switch node voltage SW rises to V
IN
and the Boost pin rises
to V
IN
+ INTV
CC
. The value of the boost capacitor C
B
needs
to be 100 times greater than the total input capacitance of
the topside MOSFET. In most applications 0.1µF is ad-
equate. The reverse breakdown on D
B
must be greater than
V
IN(MAX).
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
VV
R
R
VV
OUT OUT
=+
119 1
2
1
119.,.
12
LTC1435A
APPLICATIONS INFORMATION
WUU
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The external resistive divider is connected to the output as
shown in Figure 5 allowing remote voltage sensing.
V
OSENSE
LTC1435A
R1
R2
1435A F05
100pF
1.19V V
OUT
9V
SGND
Figure 5. Setting the LTC1435A Output Voltage
Run/Soft Start Function
The RUN/SS pin is a dual purpose pin that provides the soft
start function and a means to shut down the LTC1435A. Soft
start reduces surge currents from V
IN
by gradually increas-
ing the internal current limit.
Power supply sequencing
can
also be accomplished using this pin.
An internal 3µA current source charges up an external
capacitor C
SS.
When the voltage on RUN/SS reaches 1.3V
the LTC1435A begins operating. As the voltage on RUN/SS
continues to ramp from 1.3V to 2.4V, the internal current
limit is also ramped at a proportional linear rate. The cur-
rent limit begins at approximately 50mV/R
SENSE
(at V
RUN/
SS
= 1.3V) and ends at 150mV/R
SENSE
(V
RUN/SS
> 2.7V). The
output current thus ramps up slowly, charging the output
capacitor. If RUN/SS has been pulled all the way to ground
there is a delay before starting of approximately 500ms/µF,
followed by an additional 500ms/µF to reach full current.
t
DELAY
= 5(10
5
)C
SS
Seconds
Pulling the RUN/SS pin below 1.3V puts the LTC1435A into
a low quiescent current shutdown (I
Q
< 25µA). This pin can
be driven directly from logic as shown in Figure 6. Diode
D1 in Figure 6 reduces the start delay but allows C
SS
to ramp
up slowly for the soft start function; this diode and C
SS
can
be deleted if soft start is not needed. The RUN/SS pin has
an internal 6V Zener clamp (See Functional Diagram).
Foldback Current Limiting
As described in Power MOSFET and D1 Selection, the worst-
case dissipation for either MOSFET occurs with a short-
circuited output, when the synchronous MOSFET conducts
the current limit value almost continuously. In most appli-
cations this will not cause excessive heating, even for
extended fault intervals. However, when heat sinking is at
a premium or higher R
DS(ON)
MOSFETs are being used,
foldback current limiting should be added to reduce the
current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding diode
D
FB
between the output and the I
TH
pin as shown in the
Functional Diagram. In a hard short (V
OUT
= 0V) the cur-
rent will be reduced to approximately 25% of the maximum
output current. This technique may be used for all applica-
tions with regulated output voltages of 1.8V or greater.
SFB Pin Operation
When the SFB pin drops below its ground referenced 1.19V
threshold, continuous mode operation is forced. In continu-
ous mode, the large N-channel main and synchronous
switches are used regardless of the load on the main output.
In addition to providing a logic input to force continuous
synchronous operation, the SFB pin provides a means to
regulate a flyback winding output. Continuous synchronous
operation allows power to be drawn from the auxiliary
windings without regard to the primary output load. The SFB
pin provides a way to force continuous synchronous op-
eration as needed by the flyback winding.
The secondary output voltage is set by the turns ratio of the
transformer in conjunction with a pair of external resistors
returned to the SFB pin as shown in Figure 4a. The second-
ary regulated voltage, V
SEC
, in Figure 4a is given by:
VNV
R
R
SEC OUT
≈+
()
>+
1 1 19 1
6
5
.
where N is the turns ratio of the transformer and V
OUT
is
the main output voltage sensed by V
OSENSE
.
Minimum On-Time Considerations
Minimum on-time, t
ON(MIN)
, is the smallest amount of time
that the LTC1435A is capable of turning the top MOSFET
1435 F06
C
SS
D1
3.3V OR 5V RUN/SS
C
SS
RUN/SS
Figure 6. RUN/SS Pin Interfacing

LTC1435AIG#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Single Const Freq Syn Sw Reg Cntrl
Lifecycle:
New from this manufacturer.
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