OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LC75890W-2H

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
LC75890W
www.onsemi.com
16
(4) DT … 1/4-duty 1/3-bias drive or static drive switching control data
This control data bit selects either 1/4-duty 1/3-bias drive or static drive.
DT Drive scheme
Common output pins states
COM2 COM3 COM4
0 1/4 duty 1/3 bias drive COM2 COM3 COM4
1 Static drive “L” (V
SS
) “L” (V
SS
) “L” (V
SS
)
Note: COM2, COM3, COM4 : Common output
“L” (V
SS
) : ”L” (V
SS
) level output
(5) EXF … External clock operating frequency setting control data
This control data bit sets the operating frequency of the external clock which input into the OSCI pin, when the
external clock operating mode (OC = "1") is set. However, this control data is effective only when external clock
operating mode (OC = "1") is set.
EXF External clock operating frequency f
CK
[kHz]
0 f
CK
1=300[kHz]typ
1 f
CK
2=38[kHz]typ
(6) OC … Internal oscillator operating mode/external clock operating mode switching control data
This control data bit selects either the internal oscillator operating mode or external clock operating mode.
OC Fundamental clock operating mode
I/O pin (S37/OSCI) state
0 Internal oscillator operating mode S37
1 External clock operating mode OSCI
Note: S37: Segment output
OSCI: External clock input
(7) SC … Segment on/off control data
This control data bit controls the on/off state of the segments.
SC Display state
0 On
1 Off
Note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off
waveforms from the segment output pins.
(8) BU … Normal mode/power-saving mode control data
This control data bit selects either normal mode or power-saving mode.
BU Mode
0 Normal mode
1
Power saving mode
In this mode, the internal oscillator circuit stops oscillation (the S37/OSCI pin is configured for segment
output) if the IC is in the internal oscillator operating mode (OC=0) and the IC stops receiving external clock
signals (the S37/OSCI pin is configured for external clock input) if the IC is in the external clock operating
mode (OC=1). In addition, the common and segment output pins go to the V
SS
level and the operation of
LCD drive bias voltage stabilization circuit stops.
However, the S1/P1 to S12/P12 output pins can be used as general-purpose output ports under the control
of the data bits P0 to P3. (The general-purpose output port P1 to P12 can not be used as PWM output).
LC75890W
www.onsemi.com
17
(9) W10 to W15, W20 to W25, W30 to W35 … PWM data of the PWM output
These control data bits set the pulse width of the PWM output P1 to P12. However, when the PWM output function
isn’t used, these control data bits become invalid. In addition, when the external clock operating frequency is set the
f
CK
2 = 38[kHz]typ (EXF="1") in external clock operating mode (OC = "1"), these control data bits become invalid.
Wn0 Wn1 Wn2 Wn3 Wn4 Wn5
Pulse width of
PWM output
Wn0 Wn1 Wn2 Wn3 Wn4 Wn5
Pulse width of
PWM output
0 0 0 0 0 0 (1/64)×Tp 0 0 0 0 0 1 (33/64)×Tp
1 0 0 0 0 0 (2/64)×Tp 1 0 0 0 0 1 (34/64)×Tp
0 1 0 0 0 0 (3/64)×Tp 0 1 0 0 0 1 (35/64)×Tp
1 1 0 0 0 0 (4/64)×Tp 1 1 0 0 0 1 (36/64)×Tp
0 0 1 0 0 0 (5/64)×Tp 0 0 1 0 0 1 (37/64)×Tp
1 0 1 0 0 0 (6/64)×Tp 1 0 1 0 0 1 (38/64)×Tp
0 1 1 0 0 0 (7/64)×Tp 0 1 1 0 0 1 (39/64)×Tp
1 1 1 0 0 0 (8/64)×Tp 1 1 1 0 0 1 (40/64)×Tp
0 0 0 1 0 0 (9/64)×Tp 0 0 0 1 0 1 (41/64)×Tp
1 0 0 1 0 0 (10/64)×Tp 1 0 0 1 0 1 (42/64)×Tp
0 1 0 1 0 0 (11/64)×Tp 0 1 0 1 0 1 (43/64)×Tp
1 1 0 1 0 0 (12/64)×Tp 1 1 0 1 0 1 (44/64)×Tp
0 0 1 1 0 0 (13/64)×Tp 0 0 1 1 0 1 (45/64)×Tp
1 0 1 1 0 0 (14/64)×Tp 1 0 1 1 0 1 (46/64)×Tp
0 1 1 1 0 0 (15/64)×Tp 0 1 1 1 0 1 (47/64)×Tp
1 1 1 1 0 0 (16/64)×Tp 1 1 1 1 0 1 (48/64)×Tp
0 0 0 0 1 0 (17/64)×Tp 0 0 0 0 1 1 (49/64)×Tp
1 0 0 0 1 0 (18/64)×Tp 1 0 0 0 1 1 (50/64)×Tp
0 1 0 0 1 0 (19/64)×Tp 0 1 0 0 1 1 (51/64)×Tp
1 1 0 0 1 0 (20/64)×Tp 1 1 0 0 1 1 (52/64)×Tp
0 0 1 0 1 0 (21/64)×Tp 0 0 1 0 1 1 (53/64)×Tp
1 0 1 0 1 0 (22/64)×Tp 1 0 1 0 1 1 (54/64)×Tp
0 1 1 0 1 0 (23/64)×Tp 0 1 1 0 1 1 (55/64)×Tp
1 1 1 0 1 0 (24/64)×Tp 1 1 1 0 1 1 (56/64)×Tp
0 0 0 1 1 0 (25/64)×Tp 0 0 0 1 1 1 (57/64)×Tp
1 0 0 1 1 0 (26/64)×Tp 1 0 0 1 1 1 (58/64)×Tp
0 1 0 1 1 0 (27/64)×Tp 0 1 0 1 1 1 (59/64)×Tp
1 1 0 1 1 0 (28/64)×Tp 1 1 0 1 1 1 (60/64)×Tp
0 0 1 1 1 0 (29/64)×Tp 0 0 1 1 1 1 (61/64)×Tp
1 0 1 1 1 0 (30/64)×Tp 1 0 1 1 1 1 (62/64)×Tp
0 1 1 1 1 0 (31/64)×Tp 0 1 1 1 1 1 (63/64)×Tp
1 1 1 1 1 0 (32/64)×Tp 1 1 1 1 1 1 (64/64)×Tp
Note: W10 to W15 … PWM data of the PWM output (Ch1)
W20 to W25 … PWM data of the PWM output (Ch2)
W30 to W35 … PWM data of the PWM output (Ch3)
1
fp
Tp=
LC75890W
www.onsemi.com
18
(10) PF0 to PF3 … PWM output waveform frame frequency setting control data
These control data bits set the frame frequency of the PWM output waveforms. However, when the PWM output
function isn’t used, these control data bits become invalid. In addition, when the external clock operating frequency
is set the f
CK
2 = 38[kHz]typ (EXF="1") in external clock operating mode (OC = "1"), these control data bits
become invalid.
Control data PWM output waveform frame frequency fp[Hz]
PF0 PF1 PF2 PF3
Internal oscillator operating mode
(The control data OC is 0,
fosc=300[kHz] typ)
External clock operating mode
(The control data OC is 1 and EXF is 0,
f
CK
1=300[kHz] typ)
0 0 0 0 fosc/1536 f
CK
1/1536
1 0 0 0 fosc/1408 f
CK
1/1408
0 1 0 0 fosc/1280 f
CK
1/1280
1 1 0 0 fosc/1152 f
CK
1/1152
0 0 1 0 fosc/1024 f
CK
1/1024
1 0 1 0 fosc/896 f
CK
1/896
0 1 1 0 fosc/768 f
CK
1/768
1 1 1 0 fosc/640 f
CK
1/640
0 0 0 1 fosc/512 f
CK
1/512
1 0 0 1 fosc/384 f
CK
1/384
0 1 0 1 fosc/256 f
CK
1/256
Note: When are setting (PF0, PF1, PF2, PF3)=(1, 1, 0, 1) and (X, X, 1, 1), the frame frequency is same as frame
frequency at the time of the (PF0, PF1, PF2, PF3)=(1, 0, 1, 0) setting (fosc/896, f
CK
1/896).
X: don’t care
(11) P1A, P1B to P12A, P12B … General-purpose output function/PWM output function switiching control data of the
general-purpose output port
These control data bits set the general-purpose output function (High or low level output) or PWM output function
of the general-purpose output ports P1 to P12. However, when the S1/P1 to S12/P12 output pins arn’t set the
general-purpose output port, these control data bits become invalid. In addition, be careful of being unable to set a
PWM output function when the external clock operating frequency is set the f
CK
2 = 38[kHz]typ (EXF="1") in
external clock operating mode (OC = "1").
PnA
PnB Functions of the general-purpose output port (Pn)
0
0 General-purpose output function (High or low level output)
1
0 PWM output function (Ch1)
0
1 PWM output function (Ch2)
1
1 PWM output function (Ch3)
Note: The data PnA, PnB (n=1 to 12) are the control data switching the general-purpose output function or PWM
output function of the general-purpose output ports P1 to p12. For example, if the S10/P10 output pin is set the
general-purpose output port, the general-purpose output port P10 pin is selected the PWM output function
(Ch1) when (P10A, P10B) = (1, 0).
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

LC75890W-2H

Mfr. #:
Buy LC75890W-2H
Manufacturer:
ON Semiconductor
Description:
LCD Drivers LCD DISPLAY DRIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet