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ICS527R-03LFT

P1-P3P4-P6P7-P9
ICS527-03
CLOCK SLICER USER CONFIGURABLE PECL OUTPUT ZDB PECL ZDB AND MULTIPLIER/DIVIDER
IDT™ / ICS™
CLOCK SLICER USER CONFIGURABLE PECL OUTPUT ZDB 4
ICS527-03 REV E 051310
Typical Example
The following connection diagram shows the implementation of the example from the previous section.
This will generate a 50 MHz clock synchronously with a 40 MHz input. The layout diagram below will
produce the waveforms shown on the right.
Note: The series termination resistor is located before
the feedback
F6
FBPECL
F5
F4
GND
F3
CLKIN
PDTS
F0
F1
F2
PECL
PECL
GND
S1
VDD
R0
VDD
DIV2
S0
R2
R1
R5
R6
R4
R3
FBPECL
RES
0.01 F
0.01 F
VDD
560
50 MHz
PECL output resistor network is not shown, but
is identical to PECL
VDD
40 MHz
(PECLIN shown)
50 MHz PECL
50 MHz PECL
ICS527-03
CLOCK SLICER USER CONFIGURABLE PECL OUTPUT ZDB PECL ZDB AND MULTIPLIER/DIVIDER
IDT™ / ICS™
CLOCK SLICER USER CONFIGURABLE PECL OUTPUT ZDB 5
ICS527-03 REV E 051310
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) Each 0.01µF decoupling capacitor should be
mounted on the component side of the board as close
to the VDD pin as possible. No via’s should be used
between decoupling capacitor and VDD pin. The PCB
trace to VDD pin should be kept as short as possible, as
should the PCB trace to the ground via.
2) PECL termination networks should be located as
close to the outputs as possible.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed away
from the ICS527-03. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
ICS527-03
CLOCK SLICER USER CONFIGURABLE PECL OUTPUT ZDB PECL ZDB AND MULTIPLIER/DIVIDER
IDT™ / ICS™
CLOCK SLICER USER CONFIGURABLE PECL OUTPUT ZDB 6
ICS527-03 REV E 051310
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS527-03. These ratings,
which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Recommended Operation Conditions
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature 0 to +70° C
Item Rating
Supply Voltage, VDD 7V
All Inputs and Outputs -0.5V to VDD+0.5V
Ambient Operating Temperature 0 to +70° C
Storage Temperature -65 to +150° C
Junction Temperature 175° C
Soldering Temperature 260° C
Parameter Min. Typ. Max. Units
Ambient Operating Temperature, ICS527R-02 0 +70 ° C
Ambient Operating Temperature, ICS527R-02I 0 +70 ° C
Power Supply Voltage (measured in respect to GND) +3.15 +3.3 +3.45 V
Parameter Symbol Conditions Min. Typ. Max. Units
Operating Voltage VDD 3.15 3.3 3.45 V
Supply Current IDD 15 MHz in, 60MHz out,
no load
15 mA
Supply Current, Power Down IDDPD PDTS
=0 20 µA
Input High Voltage V
IH
2V
Input Low Voltage V
IL
0.8 V
Input High Voltage, PECLIN
and FBIN
V
IH
VDD/2+1
V
Input Low Voltage, PECLIN
and FBIN
V
IL
VDD/2-1
V
Output High Voltage V
OH
I
OH
= -12 mA 2.4 V
Output Low Voltage V
OL
I
OL
= 12 mA 0.4 V
P1-P3P4-P6P7-P9

ICS527R-03LFT

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Description:
IC CLK SLICER PECL ZDB 28-SSOP
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