PRODUCT SPECIFICATION
nRF24AP1 Single Chip 2.4 GHz Radio Transceiver with Embedded ANT Protocol
Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway - Phone +4772898900 - Fax +4772898989
Revision: 1.0 Page 12 of 25 September 2006
8. ARCHITECTURAL OVERVIEW
The nRF24AP1 is a single-chip silicon solution that integrates a 2.4GHz transceiver and
the ANT RF protocol stack. The ANT protocol stack is stored on-chip and is executed by
the nRF24AP1’s internal MCU core.
Functionally, the nRF24AP1 is composed of 4 main building blocks as shown in Figure
1. Together, the 4 blocks enable the drop-in RF and protocol solution. As shown, the 4
main blocks are the serial interface, the timing interface, the ANT protocol engine, and
the RF transceiver. Both the ANT protocol engine and the RF transceiver are embedded
within the device and interact with the external host environment through a UART or
synchronous serial interface. This functional approach allows the nRF24AP1 to be treated
as a black box wireless solution from the system application perspective. Integration of an
RF protocol with the RF physical layer is not required. Application developers provides
channel configuration and message data information to the device through the serial
interface, and the nRF24AP1 executes the configuration and sends/receives the message
data packets over the air to other waiting devices.
ANT is a 2.4GHz bidirectional wireless Personal Area Network (PAN) communications
technology optimized for transferring low data-rate, low latency data between multiple
ANT-enabled devices. The ultra-low power consumption of ANT guarantees an extended
battery life even from low capacity supplies such as a coin cell battery, such as are
required for heart rate monitors, bicycle computers, and wrist watches. The small size and
low-cost implementation of ANT proves essential in allowing effortless integration into
the tiny form factor of wrist watches, PDAs, and mobile phones.
The ANT – HOST interface has been designed with utmost simplicity in mind so that it
can be easily and quickly implemented into new devices and applications. The
encapsulation of the wireless protocol complexity within the ANT chipset vastly reduces
the burden on the application host controller, allowing a low-cost 4-bit or 8-bit
Microcontroller (MCU) to establish and maintain complex wireless networks with remote
devices. Data transfers can be scheduled in a deterministic or ad-hoc fashion, and a burst
mode allows for the efficient transfer of large amounts of stored data to and from a PC or
other computing device. The ANT system aggressively balances functionality, cost, size,
and power consumption within the constraints of a mobile Personal Area Network.
The ANT protocol implements layers 1-4 of the OSI networking stack as well as
automatically providing session authentication of network devices. For description of
layer 3 and 4, please refer to the “ANT Message Protocol and Usage” document.
