RT8064
9
DS8064-07 November 2012 www.richtek.com
©
Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Application Information
The basic IC application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by C
IN
and C
OUT
.
Main Control Loop
During normal operation, the internal upper power switch
(P-MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the peak
inductor current reaches the value defined by the output
voltage (V
COMP
) of the error amplifier. The error amplifier
adjusts its output voltage by comparing the feedback signal
from a resistive voltage divider on the FB pin with an internal
0.8V reference. When the load current increases, it causes
a reduction in the feedback voltage relative to the reference.
The error amplifier increases its output voltage until the
average inductor current matches the new load current.
When the upper power MOSFET shuts off, the lower
synchronous power switch (N-MOSFET) turns on until
the beginning of the next clock cycle.
Output Voltage Setting
The output voltage is set by an external resistive voltage
divider according to the following equation :
⎛⎞
×
⎜⎟
⎝⎠
OUT REF
R1
V = V 1 +
R2
where V
REF
equals to 0.8V typical.
The resistive voltage divider allows the FB pin to sense a
fraction of the output voltage as shown in Figure 1.
Figure 1. Setting the Output Voltage
Soft-Start
The IC contains an external soft-start clamp that gradually
raises the output voltage. The soft-start timing is
programmed by the external capacitor between SS pin
and GND. The chip provides an internal 10μA charge current
for the external capacitor. If 10nF capacitor is used to set
the soft-start, the period will be 800μs (typ.).
Power Good Output
The power good output is an open-drain output and requires
a pull up resistor. When the output voltage is 12.5% above
or 12.5% below its set voltage, PGOOD will be pulled
low. It is held low until the output voltage returns to within
the allowed tolerances once more. During soft-start,
PGOOD is actively held low and is only allowed to transition
high when soft-start is over and the output voltage reaches
87.5% of its set voltage.
Operating Frequency
Selection of the operating frequency is a tradeoff between
efficiency and component size. Higher frequency operation
allows the use of smaller inductor and capacitor values.
Lower frequency operation improves efficiency by reducing
internal gate charge and switching losses but requires
larger inductance and/or capacitance to maintain low output
ripple voltage.
The operating frequency of the IC is determined by an
external resistor, R
OSC
, that is connected between the RT
pin and ground. The value of the resistor sets the ramp
current that is used to charge and discharge an internal
timing capacitor within the oscillator. The practical switching
frequency ranges from 200kHz to 2MHz. However, when
the RT pin is floating, the internal frequency is set at 2MHz.
Determine the RT resistor value by examining the curve
below. Please notice the minimum on time is about 90ns.
FB
GND
R1
R2
RT8064
V
OUT
