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IS64WV102416BLL-10MLA3-TR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 13
Rev. G
06/02/2014
IS61WV102416ALL
IS61WV102416BLL
IS64WV102416BLL
WRITE CYCLE SWITCHING CHARACTERISTICS
(1,2)
(OverOperatingRange)
-20 ns
Symbol Parameter Min. Max. Unit
twC WriteCycleTime 20 — ns
tsCe CEtoWriteEnd 12 — ns
taw AddressSetupTime 12 — ns
toWriteEnd
tHa AddressHoldfromWriteEnd 0 — ns
tsa AddressSetupTime 0 — ns
tPwb LB, UBValidtoEndofWrite 12 — ns
tPwe1 WE Pulse Width (OE=HIGH) 12 — ns
tPwe2 WE Pulse Width (OE=LOW) 17 — ns
tsd DataSetuptoWriteEnd 9 — ns
tHd DataHoldfromWriteEnd 0 — ns
tHzwe
(3)
WELOWtoHigh-ZOutput — 9 ns
tLzwe
(3)
WEHIGHtoLow-ZOutput 3 — ns
Notes:
1. TestconditionsforIS61WV6416LLassumesignaltransitiontimesof1.5nsorless,timingreference
levels of 1.25V, input pulse levels of 0.4V to V
dd-0.3VandoutputloadingspeciedinFigure1a.
2. TestedwiththeloadinFigure1b.Transitionismeasured±500mVfromsteady-statevoltage.Not
100% tested.
3. TheinternalwritetimeisdenedbytheoverlapofCELOWandUB or LB, and WELOW.Allsignals
mustbeinvalidstatestoinitiateaWrite,butanyonecangoinactivetoterminatetheWrite.TheData
InputSetupandHoldtimingarereferencedtotherisingorfallingedgeofthesignalthatterminates
the write.
14 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. G
06/02/2014
IS61WV102416ALL
IS61WV102416BLL
IS64WV102416BLL
AC WAVEFORMS
WRITE CYCLE NO. 1
(1,2)
(CE Controlled, OE=HIGHorLOW)
DATA UNDEFINED
t WC
VALID ADDRESS
t SCE
t PWE1
t PWE2
t AW
t HA
HIGH-Z
t HD
t SA
t HZWE
ADDRESS
CE
WE
D
OUT
D
IN
DATA
IN
VALID
t LZWE
t SD
CE_WR1.eps
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 15
Rev. G
06/02/2014
IS61WV102416ALL
IS61WV102416BLL
IS64WV102416BLL
AC WAVEFORMS
WRITE CYCLE NO. 2
(WE Controlled. OE isHIGHDuringWriteCycle)
(1,2)
DATA UNDEFINED
LOW
t
WC
VALID ADDRESS
t
PWE1
t
AW
t
HA
HIGH-Z
t
PBW
t
HD
t
SA
t
HZWE
ADDRESS
CE
UB, LB
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
UB_CEWR2.eps
WRITE CYCLE NO. 3
(WE Controlled. OE isLOWDuringWriteCycle)
(1)
DATA UNDEFINED
t
WC
VALID ADDRESS
LOW
LOW
t
PWE2
t
AW
t
HA
HIGH-Z
t
PBW
t
HD
t
SA
t
HZWE
ADDRESS
CE
UB, LB
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
UB_CEWR3.eps
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

IS64WV102416BLL-10MLA3-TR

Mfr. #:
Buy IS64WV102416BLL-10MLA3-TR
Manufacturer:
ISSI
Description:
SRAM 16M (1Mx16) 10ns Async SRAM
Lifecycle:
New from this manufacturer.
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