M41T00 clock operation M41T00
16/25 DocID6100 Rev 10
Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator
cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of
adjustment per calibration step in the calibration register. Assuming that the oscillator is in
fact running at exactly 32768 Hz, each of the 31 increments in the calibration byte would
represent +10.7 or –5.35 seconds per month which corresponds to a total range of +5.5 or
–2.75 minutes per month.
Two methods are available for ascertaining how much calibration a given M41T00 may
require. The first involves simply setting the clock, letting it run for a month and comparing it
to a known accurate reference (like WWV broadcasts). While that may seem crude, it allows
the designer to give the end user the ability to calibrate his clock as his environment may
require, even after the final product is packaged in a non-user serviceable enclosure. All the
designer has to do is provide a simple utility that accessed the calibration byte.
The second approach is better suited to a manufacturing environment, and involves the use
of some test equipment. When the frequency test (FT) bit, the seventh-most significant bit in
the control register, is set to a '1', and the oscillator is running at 32768 Hz, the FT/OUT pin
of the device will toggle at 512 Hz. Any deviation from 512 Hz indicates the degree and
direction of oscillator frequency shift at the test temperature.
For example, a reading of 512.01024 Hz would indicate a +20 ppm oscillator frequency
error, requiring a –10(XX00 1010b) to be loaded into the calibration byte for correction. Note
that setting or changing the calibration byte does not affect the frequency test output
frequency.
Figure 12. Crystal accuracy across temperature
AI00999b
–160
0 10203040506070
Frequency (ppm)
Temperature °C
80–10–20–30–40
–100
–120
–140
–40
–60
–80
20
0
–20
ΔF
= K x (T –T
O
)
2
K = –0.036 ppm/°C
2
± 0.006 ppm/°C
2
T
O
= 25°C ± 5°C
F
DocID6100 Rev 10 17/25
M41T00 M41T00 clock operation
25
Figure 13. Clock calibration
3.2 Output driver pin
When the FT bit is not set, the FT/OUT pin becomes an output driver that reflects the
contents of D7 of the control register. In other words, when D6 of address 7 is a zero and D7
of address 7 is a zero and then the FT/OUT pin will be driven low.
Note: The FT/OUT pin is open drain which requires an external pull-up resistor.
3.3 Initial power-on defaults
Upon initial application of power to the device, the FT bit will be set to a '0' and the OUT bit
will be set to a '1'. All other register bits will initially power on in a random state.
AI00594B
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION
Maximum ratings M41T00
18/25 DocID6100 Rev 10
4 Maximum ratings
Stressing the device above the rating listed in the "Absolute maximum ratings" table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied.
Caution: Negative undershoots below -0.3 V are not allowed on any pin while in the backup mode.
Table 6. Absolute maximum ratings
Symbol Parameter Value Unit
T
STG
Storage temperature (V
CC
off, oscillator off) –55 to 125 °C
T
A
Ambient operating temperature -40 to 85 °C
V
IO
Input or output voltages –0.3 to 7 V
T
SLD
(1)
1. Reflow at peak temperature of 260°C (total thermal budget not to exceed 245 °C for greater than 30
seconds).
Lead solder temperature for 10 seconds 260 °C
V
CC
Supply voltage –0.3 to 7 V
I
O
Output current 20 mA
P
D
Power dissipation 0.25 W

M41T00M6F

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Real Time Clock Serial 64 (8X8)
Lifecycle:
New from this manufacturer.
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