MAX6636UP9A+T Datasheet MAX6636UP9A+, MAX6636UP9A+T | P7-P9

ed, and the temperature registers are not updated. The

previous data is not changed and remains available.

SMBus Digital Interface

From a software perspective, the MAX6636 appears as

a series of 8-bit registers that contain temperature mea-

surement data, alarm threshold values, and control bits.

A standard SMBus-compatible, 2-wire serial interface is

used to read temperature data and write control bits

and alarm threshold data. The same SMBus slave

address also provides access to all functions.

The MAX6636 employs four standard SMBus protocols:

write byte, read byte, send byte, and receive byte

(Figure 2). The shorter receive byte protocol allows

quicker transfers, provided that the correct data regis-

ter was previously selected by a read byte instruction.

Use caution with the shorter protocols in multimaster

systems, since a second master could overwrite the

command byte without informing the first master. Figure

3 is the SMBus write-timing diagram and Figure 4 is the

SMBus read-timing diagram.

The remote diode 1 measurement channel provides 11

bits of data (1 LSB = 0.125°C). All other temperature-

measurement channels provide 8 bits of temperature

data (1 LSB = 1°C). The 8 most significant bits (MSBs)

can be read from the local temperature and remote

temperature registers. The remaining 3 bits for remote

diode 1 can be read from the extended temperature

MAX6636

7-Channel Precision Temperature Monitor

_______________________________________________________________________________________ 7

Figure 1. Internal Block Diagram

DXP1

DXN1

DXP2

DXN2

DXP3

DXN3

DXP4

DXN4

DXP5

DXN5

DXP6

DXN6

INPUT

BUFFER

10/100μA

REF

COUNT

COUNTER

COMMAND BYTE

REMOTE TEMPERATURES

LOCAL TEMPERATURES

ALERT THRESHOLD

OVERT THRESHOLD

ALERT RESPONSE ADDRESS

ALARM

ALU

ADC

SMBus

INTERFACE

MAX6636

SCL SDA

OVERT

AVERT

STBY

MAX6636

resolution register should be read first. This prevents

the most significant bits from being overwritten by new

conversion results until they have been read. If the most

significant bits have not been read within an SMBus

timeout period (nominally 37ms), normal updating con-

tinues. Table 1 shows the main temperature register

(high-byte) data format, and Table 2 shows the extend-

ed resolution register (low-byte) data format.

Diode Fault Detection

If a channel’s input DXP_ and DXN_ are left open, the

MAX6636 detects a diode fault. An open diode fault does

not cause either ALERT or OVERT to assert. A bit in the

status register for the corresponding channel is set to 1

and the temperature data for the channel is stored as all

1s (FFh). It takes approximately 4ms for the MAX6636 to

detect a diode fault. Once a diode fault is detected, the

MAX6636 goes to the next channel in the conversion

sequence. Depending on operating conditions, a shorted

diode may or may not cause ALERT or OVERT to assert,

so if a channel will not be used, its DXN and DXP inputs

should be left unconnected.

7-Channel Precision Temperature Monitor

8 _______________________________________________________________________________________

Figure 2. SMBus Protocols

TEMP (°C) DIGITAL OUTPUT

> +127 0111 1111

+127 0111 1111

+126 0111 1110

+25 0001 1001

0 0000 0000

< 0 0000 0000

Diode fault (open) 1111 1111

Diode fault (short) 1111 1111 or 1110 1110

Table 1. Main Temperature Register

(High-Byte) Data Format

TEMP (°C) DIGITAL OUTPUT

0 000X XXXX

+0.125 001X XXXX

+0.250 010X XXXX

+0.375 011X XXXX

+0.500 100X XXXX

+0.625 101X XXXX

+0.725 110X XXXX

+0.875 111X XXXX

Table 2. Extended Resolution Temperature

S ADDRESS WR ACK ACK PDATA ACKCOMMAND

7 BITS 18 BITS8 BITS

SLAVE ADDRESS: EQUIVA-

LENT TO CHIP-SELECT LINE OF

A 3-WIRE INTERFACE

DATA BYTE: DATA GOES INTO THE REGISTER

SET BY THE COMMAND BYTE (TO SET

THRESHOLDS, CONFIGURATION MASKS, AND

SAMPLING RATE)

WRITE BYTE FORMAT

S ADDRESSADDRESS WR ACK ACK PS RD ACK ///DATACOMMAND

7 BITS 7 BITS 8 BITS8 BITS

READ BYTE FORMAT

SLAVE ADDRESS: EQUIVA-

LENT TO CHIP-SELECT LINE

COMMAND BYTE: SELECTS

WHICH REGISTER YOU ARE

REDING FROM

SPADDRESS WR ACK ACKCOMMAND

7 BITS 8 BITS

SEND BYTE FORMAT

COMMAND BYTE: SENDS COM-

MAND WITH NO DATA, USUALLY

USED FOR ONE-SHOT COMMAND

SPADDRESS RD ACK ///DATA

7 BITS 8 BITS

RECEIVE BYTE FORMAT

DATA BYTE: READS DATA FROM

THE REGISTER COMMANDED

BY THE LAST READ BYTE OR

WRITE BYTE TRANSMISSION;

ALSO USED FOR SMBus ALERT

RESPONSE RETURN ADDRESS

SLAVE ADDRESS: REPEATED

DUE TO CHANGE IN DATA-

FLOW DIRECTION

DATA BYTE: READS FROM

THE REGISTER SET BY THE

COMMAND BYTE

S = START CONDITION.

P = STOP CONDITION.

SHADED = SLAVE TRANSMISSION.

/// = NOT ACKNOWLEDGED.

Alarm Threshold Registers

There are 11 alarm threshold registers that store over-

temperature ALERT and OVERT threshold values.

Seven of these registers are dedicated to store one

local alert temperature threshold limit and six remote

alert temperature threshold limits (see the

ALERT

Interrupt Mode

section). The remaining four registers

are dedicated to remote channels 1, 4, 5, and 6 to store

overtemperature threshold limits (see the

OVERT

Overtemperature Alarms

section). Access to these reg-

isters is provided through the SMBus interface.

ALERT

Interrupt Mode

An ALERT interrupt occurs when the internal or external

temperature reading exceeds a high-temperature limit

(user programmable). The ALERT interrupt output sig-

nal can be cleared by reading the status register(s)

associated with the fault(s) or by successfully respond-

ing to an alert response address transmission by the

master. In both cases, the alert is cleared but is

reasserted at the end of the next conversion if the fault

condition still exists. The interrupt does not halt automat-

ic conversions. The ALERT output is open drain so that

multiple devices can share a common interrupt line. All

ALERT interrupts can be masked using the configuration

3 register. The POR state of these registers is shown in

Table 1.

MAX6636

7-Channel Precision Temperature Monitor

_______________________________________________________________________________________ 9

SMBCLK

A = START CONDITION.

B = MSB OF ADDRESS CLOCKED INTO SLAVE.

C = LSB OF ADDRESS CLOCKED INTO SLAVE.

D = R/W BIT CLOCKED INTO SLAVE.

AB CD

HIJ

SMBDATA

SU:STA

HD:STA

LOW

HIGH

SU:DAT

SU:STO

BUF

LMK

E = SLAVE PULLS SMBDATA LINE LOW.

F = ACKNOWLEDGE BIT CLOCKED INTO MASTER.

G = MSB OF DATA CLOCKED INTO SLAVE.

H = LSB OF DATA CLOCKED INTO SLAVE.

I = MASTER PULLS DATA LINE LOW.

J = ACKNOWLEDGE CLOCKED INTO SLAVE.

K = ACKNOWLEDGE CLOCK PULSE.

L = STOP CONDITION.

M = NEW START CONDITION.

Figure 3. SMBus Write-Timing Diagram

SMBCLK

AB CD

FG H

SMBDATA

SU:STA

HD:STA

LOW

HIGH

SU:DAT

HD:DAT

SU:STO

BUF

A = START CONDITION.

B = MSB OF ADDRESS CLOCKED INTO SLAVE.

C = LSB OF ADDRESS CLOCKED INTO SLAVE.

D = R/W BIT CLOCKED INTO SLAVE.

E = SLAVE PULLS SMBDATA LINE LOW.

F = ACKNOWLEDGE BIT CLOCKED INTO MASTER.

G = MSB OF DATA CLOCKED INTO MASTER.

H = LSB OF DATA CLOCKED INTO MASTER.

I = MASTER PULLS DATA LINE LOW.

J = ACKNOWLEDGE CLOCKED INTO SLAVE.

K = ACKNOWLEDGE CLOCK PULSE.

L = STOP CONDITION.

M = NEW START CONDITION.

Figure 4. SMBus Read-Timing Diagram

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18

MAX6636UP9A+T

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