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74HC2G08DP,125
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
74HC_HCT2G08
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2013. All rights rese
rved.
Product data sheet
Rev
. 5 — 8 October 2013
9 of 15
NXP Semiconductors
74HC2G08; 74HCT2G08
Dual 2-input AND gate
13. Package
outline
Fig 8.
Package outline SOT5
05-2 (TSSOP8)
UNIT
A
1
A
max.
A
2
A
3
b
p
L
H
E
L
p
wy
v
ce
D
(1)
E
(1)
Z
(1)
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
0.15
0.00
0.95
0.75
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
0.65
4.1
3.9
0.70
0.35
8
°
0
°
0.13
0.1
0.2
0.5
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
0.47
0.33
SOT505-2
- - -
02-01-16
w
M
b
p
D
Z
e
0.25
14
8
5
θ
A
2
A
1
L
p
(A
3
)
detail X
A
L
H
E
E
c
v
M
A
X
A
y
2.5
5 mm
0
scale
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
1.1
pin 1 index
74HC_HCT2G08
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2013. All rights rese
rved.
Product data sheet
Rev
. 5 — 8 October 2013
10 of 15
NXP Semiconductors
74HC2G08; 74HCT2G08
Dual 2-input AND gate
Fig 9.
Package outlin
e SOT765-1 (VSSOP8)
UNIT
A
1
A
max.
A
2
A
3
b
p
L
H
E
L
p
wy
v
ce
D
(1)
E
(2)
Z
(1)
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
0.15
0.00
0.85
0.60
0.27
0.17
0.23
0.08
2.1
1.9
2.4
2.2
0.5
3.2
3.0
0.4
0.1
8
°
0
°
0.13
0.1
0.2
0.4
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
0.40
0.15
Q
0.21
0.19
SOT765-1
MO-187
02-06-07
w
M
b
p
D
Z
e
0.12
14
8
5
θ
A
2
A
1
Q
L
p
(A
3
)
detail X
A
L
H
E
E
c
v
M
A
X
A
y
2.5
5 mm
0
scale
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
1
pin 1 index
74HC_HCT2G08
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2013. All rights rese
rved.
Product data sheet
Rev
. 5 — 8 October 2013
1
1 of 15
NXP Semiconductors
74HC2G08; 74HCT2G08
Dual 2-input AND gate
Fig 10.
Package
outline SOT996-2 (XSON8
)
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
SOT996-2
sot996-2_po
07-12-21
12-11-20
Unit
(1)
mm
max
nom
min
0.5
0.05
0.00
2.1
1.9
3.1
2.9
0.5
0.3
0.15
0.05
0.6
0.4
0.5
1.5
0.05
A
Dimensions (mm are the original dimensions)
XSON8: plastic extremely thin small outline package; no leads;
8 terminals; body 3 x 2 x 0.5 mm
SOT996-2
A
1
b
0.35
0.15
DE
e
e
1
LL
1
L
2
v
0.1
wy
0.05
y
1
0.1
0
1
2 mm
scale
C
y
C
y
1
X
terminal 1
index area
B
A
D
E
detail X
A
A
1
b
14
85
e
1
e
A
C
B
v
C
w
L
2
L
1
L
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
74HC2G08DP,125
Mfr. #:
Buy 74HC2G08DP,125
Manufacturer:
Nexperia
Description:
Logic Gates 5V DUAL 2-INPUT AND
Lifecycle:
New from this manufacturer.
Delivery:
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TNT
EMS
Payment:
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