74HC_HCT2G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 8 October 2013 6 of 15
NXP Semiconductors 74HC2G08; 74HCT2G08
Dual 2-input AND gate
[1] All typical values are measured at T
amb
= 25 C.
11. Dynamic characteristics
74HCT2G08
V
IH
HIGH-level input
voltage
V
CC
= 4.5 V to 5.5 V 2.0 1.6 - 2.0 - V
V
IL
LOW-level input
voltage
V
CC
= 4.5 V to 5.5 V - 1.2 0.8 - 0.8 V
V
OH
HIGH-level output
voltage
V
I
= V
IH
or V
IL
I
O
= 20 A; V
CC
= 4.5 V 4.4 4.5 - 4.4 - V
I
O
= 4.0 mA; V
CC
= 4.5 V 4.13 4.32 - 3.7 - V
V
OL
LOW-level output
voltage
V
I
= V
IH
or V
IL
I
O
= 20 A; V
CC
= 4.5 V - 0 0.1 - 0.1 V
I
O
= 4.0 mA; V
CC
= 4.5 V - 0.15 0.33 - 0.4 V
I
I
input leakage current V
I
=V
CC
or GND; V
CC
=5.5V - - 1.0 - 1.0 A
I
CC
supply current V
I
=V
CC
or GND; I
O
=0A;
V
CC
=5.5V
--10 - 20A
I
CC
additional supply
current
per input; V
CC
= 4.5 V to 5.5 V;
V
I
=V
CC
2.1 V; I
O
=0A
- - 375 - 410 A
C
I
input capacitance - 1.5 - - - pF
Table 7. Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7
.
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
74HC2G08
t
pd
propagation delay nA and nB to nY; see Figure 6
[2]
V
CC
= 2.0 V - 26 95 - 110 ns
V
CC
= 4.5 V - 9 19 - 22 ns
V
CC
= 5.0 V; C
L
= 15 pF - 9 - - - ns
V
CC
= 6.0 V - 8 16 - 20 ns
t
t
transition time see Figure 6
[3]
V
CC
= 2.0 V - 20 95 - 125 ns
V
CC
= 4.5 V - 7 19 - 25 ns
V
CC
= 6.0 V - 6 16 - 20 ns
C
PD
power dissipation
capacitance
V
I
=GNDtoV
CC
[4]
-10- - -pF
74HC_HCT2G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 8 October 2013 7 of 15
NXP Semiconductors 74HC2G08; 74HCT2G08
Dual 2-input AND gate
[1] All typical values are measured at T
amb
= 25 C.
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] t
t
is the same as t
TLH
and t
THL
.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
= C
PD
V
CC
2
f
i
N + (C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of outputs.
12. Waveforms
74HCT2G08
t
pd
propagation delay nA and nB to nY; see Figure 6
[2]
V
CC
= 4.5 V - 14 30 - 36 ns
V
CC
= 5.0 V; C
L
= 15 pF - 14 - - - ns
t
t
transition time V
CC
= 4.5 V; see Figure 6
[3]
-719- 22ns
C
PD
power dissipation
capacitance
V
I
=GNDtoV
CC
1.5 V
[4]
-10- - -pF
Table 8. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
Measurement points are given in Table 9.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 6. Propagation delay data input (nA, nB) to data output (nY) and transition time output (nY)
001aak020
nA, nB input
nY output
t
THL
t
TLH
V
M
V
I
GND
V
OH
V
OL
V
M
V
X
V
Y
t
PHL
t
PLH
Table 9. Measurement points
Type Input Output
V
M
V
M
V
X
V
Y
74HC2G08 0.5V
CC
0.5V
CC
0.1V
CC
0.9V
CC
74HCT2G08 1.3 V 1.3 V 0.1V
CC
0.9V
CC
74HC_HCT2G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 8 October 2013 8 of 15
NXP Semiconductors 74HC2G08; 74HCT2G08
Dual 2-input AND gate
Test data is given in Table 10.
Definitions for test circuit:
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= Load capacitance including jig and probe capacitance.
R
L
= Load resistance.
S1 = Test selection switch.
Fig 7. Test circuit for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aad983
DUT
V
CC
V
CC
V
I
V
O
R
T
R
L
S1
C
L
open
G
Table 10. Test data
Type Input Load S1 position
V
I
t
r
, t
f
C
L
R
L
t
PHL
, t
PLH
74HC2G08 GND to V
CC
6 ns 15 pF, 50 pF 1 k open
74HCT2G08 GND to 3 V 6 ns 15 pF, 50 pF 1 k open

74HC2G08DP,125

Mfr. #:
Manufacturer:
Nexperia
Description:
Logic Gates 5V DUAL 2-INPUT AND
Lifecycle:
New from this manufacturer.
Delivery:
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