TOTAL HARMONIC DISTORTION + NOISE
Total harmonic distortion plus noise (THD+N) is defined as
the ratio of the square root of the sum of the squares of the am-
plitudes of the harmonics and noise to the amplitude of the fun-
damental input frequency. It is usually expressed in percent (%)
or decibels (dB).
D-RANGE DISTORTION (EIAJ SPECIFICATION)
D-Range distortion is the ratio of the amplitude of the signal at
an amplitude of –60 dB to the amplitude of the distortion plus
noise. In this case, an A-weight filter is used. The value speci-
fied for D-range performance is the ratio measured plus 60 dB.
SIGNAL-TO-NOISE RATIO
The signal-to-noise ratio is defined as the ratio of the amplitude
of the output when a full-scale output is present to the ampli-
tude of the output with no signal present. It is expressed in
decibels (dB) and measured using an A-weight filter.
GAIN LINEARITY
Gain linearity is a measure of the deviation of the actual output
amplitude from the ideal output amplitude. It is determined by
measuring the amplitude of the output signal as the amplitude
of that output signal is digitally reduced to a lower level. A per-
fect D/A converter exhibits no difference between the ideal and
actual amplitudes. Gain linearity is expressed in decibels (dB).
MIDSCALE ERROR
Midscale error, or bipolar zero error, is the deviation of the ac-
tual analog output from a voltage at the bias pin when the twos
complement input code representing midscale is loaded in the
DAC. Midscale error is expressed in mV.
FUNCTIONAL DESCRIPTION
The AD1866 is a complete, monolithic dual 16-bit digital audio
DAC which runs off a single +5 volt supply. As shown in the
block diagram, each channel contains a voltage reference, a
16-bit serial-to-parallel input register, a 16-bit input latch, a
16-bit DAC, and an output amplifier.
The voltage reference section provides a reference voltage and a
false ground voltage for each channel. The low noise bandgap
circuits produce reference voltages that are unaffected by
changes in temperature, time, and power supply.
The input registers are fabricated with CMOS logic gates.
These gates allow high switching speeds and low power con-
sumption, contributing to the fast digital timing, the low glitch
and low power dissipation of the AD1866.
LL
DL
CLK
DR
LR
DGND
V
L
NRL
AGND
NRR
V
S
1
2
3
4
5
6
7
8
9
10
12
13
14
15
11
16
AD1866
16-BIT
DAC
16-BIT
DAC
16-BIT
SERIAL
REGISTER
16-BIT
SERIAL
REGISTER
V
B
L
V
O
R
V
S
V
B
R
V
REF
V
REF
V
O
L
AD1866 Functional Block Diagram
The 16-bit DAC uses a combination of segmentation and R-2R
architecture to achieve good integral and differential linearity.
The resistors which form the ladder structure are fabricated
with silicon-chromium thin film. Laser trimming of these resis-
tors further reduces linearity error, resulting in low output
distortion.
The output amplifier uses both MOS and bipolar devices and
incorporates an NPN class A output stage. It is designed to pro-
duce high slew rate, low noise, low distortion, and optimal fre-
quency response.
REV. 0
–5–
Definition of Specifications–AD1866
