GROUNDING RECOMMENDATIONS
The AD1866 has two ground pins, designated as AGND (Pin
12) and DGND (Pin 7). The analog ground, AGND, serves as
the “high quality” reference ground for analog signals and as a
return path for the supply current from the analog portion of
the device. The system analog common should be located as
close as possible to Pin 12 to minimize any voltage drop which
may develop between these two points, although the internal
circuit is designed to minimize signal dependence of the analog
return current.
The digital ground, DGND, returns ground current from the
digital logic portion of the device. This pin should be connected
to the digital common node in the system. As shown in Figure
7, the analog and digital grounds should be joined at one point
in a system. When these two grounds are connected such as at
the power supply ground, care should be taken to minimize the
voltage difference between the DGND and AGND pins in or-
der to ensure the specified performance.
POWER SUPPLIES AND DECOUPLING
The AD1866 has three power supply input pins. V
S
(Pins 9 and
15) provide the supply voltages which operate the analog por-
tion of the device including the 16-bit DACs, the voltage refer-
ences, and the output amplifiers. The V
S
supplies are designed
to operate from a +5 V supply. These pins should be decoupled
to the analog ground using a 0.1 µF capacitor. Good engineer-
ing practice suggests that the bypass capacitor be placed as
close as possible to the package pins. This minimizes the inher-
ent inductive effects of printed circuit board traces.
V
L
(Pin 1) operates the digital portions of the chip including the
input shift registers and the input latching circuitry. V
L
is also
designed to operate from a +5 V supply. This pin should be by-
passed to digital common using a 0.1 µF capacitor, again placed
as close as possible to the package pins. Figure 7 illustrates the
correct connection of the digital and analog supply bypass
capacitors.
An important feature of the AD1866 audio DAC is its ability to
operate at diminished power supply voltages. This feature is
very important in portable battery operated systems. As the bat-
teries discharge, the supply voltage drops. Unlike any other au-
dio DAC, the AD1866 can continue to function at supply
voltages as low as 3.5 V. Because of its unique design, the
power requirements of the AD1866 diminish as the battery volt-
age drops, further extending the operating time of the system.
POWER
SUPPLY
4.7µF
4.7µF
(CAPACITOR VALUES ARE 0.1 µF UNLESS OTHERWISE
INDICATED)
15
14
13
12
11
10
16
9
1
2
3
4
5
6
8
7
NRL
AGND
NRR
AD1866
LL
DL
CLK
DR
LR
DGND
V
B
R
V
B
L
+
–
+
–
V
S
V
O
L
V
L
V
O
R
V
S
Figure 7. Recommended Circuit Schematic
NOISE REDUCTION CAPACITORS
The AD1866 has two noise reduction pins, designated as NRL
(Pin 13) and NRR (Pin 11). In order to meet specifications, it
is required that external noise reduction capacitors be con-
nected from these pins to AGND to reduce the output noise
contributed by the voltage reference circuitry. As shown in Fig-
ure 7, each of these pins should be bypassed to AGND with a
4.7 µF or larger capacitor. The connections between the ca-
pacitors, package pins and AGND should be as short as pos-
sible to achieve the lowest noise.
USING V
B
L AND V
B
R
The AD1866 has two bias voltage reference pins, designated as
V
B
R (Pin 8) and V
B
L (Pin 16). Each of these pins supplies a dc
reference voltage equal to the center of the output voltage swing.
These bias voltages replace “false ground” networks previously
required in single supply audio systems. At the same time, they
allow dc coupled systems, improving audio performance.
AD1866–Analog Circuit Considerations
REV. 0–6–
