NCP5211A
http://onsemi.com
13
where:
Vramp = amount of ramp needed;
Vsw = switch note voltage;
V
FB
= voltage feedback, 0.8 V;
ton = switch on−time.
To minimize the loss in efficiency, R1 resistance should be
large, typically 100 k or larger. With R1 chosen, C2 can be
determined by the following;
C2 (Vsw V
FB
) ton(R1 Vramp)
C1 is used as a bypass capacitor and its value should be
equal to or greater than C2.
Figure 14. Small RC Filter Providing the Proper Voltage
Ramp at the Beginning of Each On−Time Cycle
Vsw
R2
1.0 k
V
FFB
V
FB
R1
C1
C2
Maximum Frequency Operation
Controller minimum pulse width limits the maximum
operating frequency. The duty cycle, given by the
output/input voltage ratio, multiplied by the period
determines the pulse width during normal operation. This
pulse width must be greater than 200 ns, or duty cycle jitter
could occur.
Current Sense Component Selection
The current limit threshold is set by sensing a 60 mV
voltage differential between the IS+ and IS− pins. Referring
to Figure 15, the time constant of the R2,C1 filter should be
set larger than the L/R1 time constant under worst case
tolerances, to prevent overshoot in the sensed voltage and
tripping the current limit too low. Resistor R3 of value equal
to R2 is added for bias current cancellation. R2 and R3
should not be made too large, to reduce errors from bias
current offsets. For typical L/R time constants, a 0.1 µF
capacitor for C1 will allow R2 to be between 1.0 k and 10 k.
The current limit without R4 and R5, which are optional,
is given by 60 mV/R1, where R1 is the internal resistance of
the inductor, obtained from the manufacturer. The addition
of R5 can be used to decrease the current limit to a value
given by:
I
LIM
(60 mV (V
OUT
R3(R3 R5))R1
where V
OUT
is the output voltage.
Similarly, omitting R5 and adding R4 will increase the
current limit to a value given by:
I
LIM
60 mVR1 (1 R2R4)
Essentially, R4 or R5 are used to increase or decrease the
inductor voltage drop which corresponds to 60 mV at the IS+
and IS− pins.
Figure 15. Current Limit
R5
R3
IS−
IS+
R2
60 mV Trip
R4
C1
R1L1
L
V
OUT
Switching
Node
Boost Component Selection for Upper FET Gate Drive
The boost (BST) pin provides for application of a higher
voltage to drive the upper FET. This voltage may be
provided by a fixed higher voltage or it may be generated
with a boost capacitor and charging diode, as shown in
Figure 16. The voltage on the BST pin must be limited to
20 V. The 18 V zener in Figure 16 serves this purpose.
NCP5211A
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14
+
+
COMP
V
FFB
V
FB
GATE(H)
GATE(L)
V
C
V
CC
PGND
IS−
R
OSC
NCP5211A
5.0 V/8 A
51 k
0.1 µF
LGND
33 µF/25 V × 3
0.1 µF
SENSE+
1.0 k 1.0%
2.9 µH
12 V
IS+
SENSE−
100 µF/10 V × 2
SGND
5.23 k 1.0%
0.1 µF
0.1 µF
10
BST
12 V
18 V
0.1 µF
33
10
4.7 k
Figure 16. Application Diagram, 12 V to 5.0 V/8 A Converter with Differential Remote Sense
680 pF
NOTE: Resistance in Ohms
MMSZ4705ET1
BAS21HT1
NTMS7N03
NTMS7N03
+
+
COMP
V
FFB
V
FB
GATE(H)
GATE(L)
V
C
V
CC
PGND
IS−
R
OSC
NCP5211A
3.3 V/8 A
51 k
0.1 µF
LGND
33 µF/25 V × 3
0.22 µF
SENSE+
1.0 k 1.0%
2.9 µH
5.0 V
IS+
SENSE−
100 µF/10 V × 2
SGND
0.1 µF
0.1 µF
10
BST
12 V
10
4.7 k
Figure 17. Application Diagram, 12 V with 5.0 V Bias to 3.3 V/8 A Converter with
Differential Remote Sense
3.16 k 1.0%
680 pF
NOTE: Resistance in Ohms
BAS21HT1
NTMS7N03
NTMS7N03
NCP5211A
http://onsemi.com
15
COMP
V
FFB
V
FB
GATE(H)
GATE(L)
V
C
V
CC
PGND
IS−
R
OSC
NCP5211A
3.3 V/5 A
1 µF
LGND
11 V
IS+
100 µF/
10 V × 2
SGND
3.16 k
0.1 µF
BST
100 pF
Figure 18. Forward Converter Application, 3.3 V, 5 A Output Converter
MMSZ4705ET1
BAS21HT1
NTMS7N03
GND
GND
36 V − 72 V
1 µF
MMSZ4898T1
18 V
2.2 µF
NTMS7N03
MTD8N20ET4
550 pF
100
10
0.1 10 1 k
51 k
51 k
U1
BCP58−10T1
4.2 H

NCP5211ADR2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC REG CTRLR BUCK 14SOIC
Lifecycle:
New from this manufacturer.
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