LTM4625
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APPLICATIONS INFORMATION
The R
FB(SL)
is the feedback resistor and the R
TR(TOP)
/
R
TR(BOT)
is the resistor divider on the TRACK/SS pin of
the slave regulator, as shown in Figure 5.
Following the previous equation, the ratio of the master’s
output slew rate (MR) to the slaves output slew rate (SR)
is determined by:
MR
SR
=
R
FB(SL)
R
FB(SL)
+60.4k
R
TR(BOT)
R
TR(TOP)
+R
TR(BOT)
For example, V
OUT(MA)
=1.5V, MR = 1.5V/1ms and V
OUT(SL)
= 1.2V, SR = 1.2V/1ms. From the equation, we could solve
that R
TR(TOP)
= 60.4k and R
TR(BOT)
= 40.2k are a good
combination for the ratiometric tracking.
The TRACK/SS pin will have the A current source on
when a resistive divider is used to implement tracking
on the slave regulator. This will impose an offset on the
TRACK/SS pin input. Smaller value resistors with the same
ratios as the resistor values calculated from the above
equation can be used. For example, where the 60.4k is
used then a 6.04k can be used to reduce the TRACK/SS
pin offset to a negligible value.
Coincident output tracking can be recognized as a special
ratiometric output tracking in which the masters output
slew rate (MR) is the same as the slaves output slew rate
(SR), waveform as shown in Figure 6.
From the equation, we could easily find that, in coincident
tracking, the slave regulators TRACK/SS pin resistor divider
is always the same as its feedback divider:
R
FB(SL)
R
FB(SL)
+60.4k
=
R
TR(BOT)
R
TR(TOP)
+R
TR(BOT)
For example, R
TR(TOP)
= 60.4k and R
TR(BOT)
= 60.4k is a
good combination for coincident tracking for a V
OUT(MA)
= 1.5V and V
OUT(SL)
= 1.2V application.
Figure 6. Output Coincident Tracking Waveform
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin is pulled
low when the output voltage exceeds a ±10% window
around the regulation point. To prevent unwanted PGOOD
glitches during transients or dynamic V
OUT
changes, the
LTM4625’s PGOOD falling edge includes a blanking delay
of approximately 52 switching cycles.
Stability Compensation
The LTM4625s internal compensation loop is designed and
optimized for use with low ESR ceramic output capacitors.
Table 7 is provided for most application requirements. In
case a bulk output capacitor is required for output ripple
or dynamic transient spike reduction, an additional 10pF
to 15pF feedforward capacitor (C
FF
) is needed between
the V
OUT
and FB pins. The LTpowerCAD design tool is
available for control loop optimization.
RUN Enable
Pulling the RUN pin to ground forces the LTM4625 into
its shutdown state, turning off both power MOSFETs and
most of its internal control circuitry. Bringing the RUN pin
above 0.7V turns on the internal reference only, while still
keeping the power MOSFETs off. Increasing the RUN pin
voltage above 1.2V will turn on the entire chip.
TIME
MASTER OUTPUT
SLAVE OUTPUT
OUTPUT VOLTAGE
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LTM4625
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APPLICATIONS INFORMATION
Pre-Biased Output Start-Up
There may be situations that require the power supply to
start up with some charge on the output capacitors. The
LTM4625 can safely power up into a pre-biased output
without discharging it.
The LTM4625 accomplishes this by forcing discontinuous
mode (DCM) operation until the TRACK/SS pin voltage
reaches 0.6V reference voltage. This will prevent the BG
from turning on during the pre-biased output start-up
which would discharge the output.
Do not pre-bias LTM4625 with an output voltage higher
than INTV
CC
(3.3V) or a voltage higher than the output
voltage set by feedback resistor (R
FB
).
Overtemperature Protection
The internal overtemperature protection monitors the junc-
tion temperature of the module. If the junction temperature
reaches approximately 160°C, both power switches will be
turned off until the temperature drops about 15°C cooler.
Low Input Application
The LTM4625 module has a separate SV
IN
pin which
makes it suitable for low input voltage applications down
to 2.375V. The SV
IN
pin is the single input of the whole
control circuitry while the V
IN
pin is the power input which
directly connects to the drain of the top MOSFET. In most
applications where V
IN
is greater than 4V, connect SV
IN
directly to V
IN
with a short trace. An optional filter, con-
sisting of a resistor (1Ω to 10Ω) between SV
IN
and V
IN
along with a 0.1µF bypass capacitor between SV
IN
and
ground, can be placed for additional noise immunity. This
filter is not necessary in most cases if good PCB layout
practices are followed (see Figure 19). In a low input
voltage (2.375V to 4V) application,
or to reduce power
dissipation by the internal bias LDO, connect SV
IN
to an
external voltage higher than 4V with a F local bypass
capacitor. Figure 21 shows an example of a low input
voltage application. Please note the SV
IN
voltage cannot
go below the V
OUT
voltage.
Thermal Considerations and Output Current Derating
The thermal resistances reported in the Pin Configuration
section of the data sheet are consistent with those param-
eters defined by JESD 51-12 and are intended for use with
finite element analysis (FEA) software modeling tools that
leverage the outcome of thermal modeling, simulation,
and correlation to hardware evaluation performed on a
µModule package mounted to a hardware test board.
The motivation for providing these thermal coefficients is
found in JESD 51-12 (Guidelines for Reporting and Using
Electronic Package Thermal Information).
Many designers may opt to use laboratory equipment
and a test vehicle such as the demo board to anticipate
the µModule regulators thermal performance in their ap-
plication at various electrical and environmental operating
conditions to compliment any FEA activities. Without FEA
software, the thermal resistances reported in the Pin Con-
figuration section are, in and of themselves, not relevant to
providing guidance of thermal performance; instead, the
derating curves provided in this data sheet can be used
in a manner that yields insight and guidance pertaining to
one’s application usage, and can be adapted to correlate
thermal performance to one’s own application.
The Pin Configuration section gives four thermal coeffi-
cients explicitly defined in JESD 51-12; these coefficients
are quoted or paraphrased below:
1. θ
JA
, the thermal resistance from junction to ambient, is
the natural convection junction-to-ambient air thermal
resistance measured in a one cubic foot sealed enclo-
sure. This environment is sometimes referred to as
still air although natural convection causes the air to
move. This value is determined with the part mounted
to a 95mm × 76mm PCB with four layers.
2. θ
JCbottom
, the thermal resistance from junction to the
bottom of the product case, is determined with all of
the component power dissipation flowing through the
bottom of the package. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the pack-
age, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
LTM4625
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For more information www.linear.com/LTM4625
APPLICATIONS INFORMATION
may be useful for comparing packages, but the test
conditions dont generally match the users application.
3. θ
JCtop
, the thermal resistance from junction to top of
the product case, is determined with nearly all of the
component power dissipation flowing through the top of
the package. As the electrical connections of the typical
µModule regulator are on the bottom of the package, it
is rare for an application to operate such that most of
the heat flows from the junction to the top of the part.
As in the case of θ
JCbottom
, this value may be useful
for comparing packages but the test conditions don’t
generally match the user’s application.
4. θ
JB
, the thermal resistance from junction to the printed
circuit board, is the junction-to-board thermal resistance
where almost all of the heat flows through the bottom
of the µModule package and into the board, and is really
the sum of the θ
JCbottom
and the thermal resistance of
the bottom of the part through the solder joints and
through a portion of the board. The board temperature
is measured a specified distance from the package.
A graphical representation of the aforementioned ther-
mal resistances is given in Figure 7; blue resistances are
contained within the μModule regulator, whereas green
resistances are external to the µModule package.
As a practical matter, it should be clear to the reader that
no individual or sub-group of the four thermal resistance
parameters defined by JESD 51-12 or provided in the
Pin Configuration section replicates or conveys normal
operating conditions of a μModule regulator. For example,
in normal board-mounted applications, never does 100%
of the device’s total power loss (heat) thermally conduct
exclusively through the top or exclusively through bot-
tom of the µModule packageas the standard defines
for θ
JCtop
and θ
JCbottom
, respectively. In practice, power
loss is thermally dissipated in both directions away from
the package—granted, in the absence of a heat sink and
airflow, a majority of the heat flow is into the board.
Within the LTM4625 be aware there are multiple power
devices and components dissipating power, with a con-
sequence that the thermal resistances relative to different
junctions of components or die are not exactly linear with
respect to total package power loss. To reconcile this
complication without sacrificing modeling simplicitybut
also, not ignoring practical realitiesan approach has been
taken using FEA software modeling along with laboratory
testing in a controlled environment chamber to reason-
ably define and correlate the thermal resistance values
supplied in this data sheet: (1) Initially, FEA software is
used to accurately build the mechanical geometry of the
Figure 7. Graphical Representation of JESD 51-12 Thermal Coefficients
4625 F07
µMODULE DEVICE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-AMBIENT THERMAL RESISTANCE COMPONENTS
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
JUNCTION AMBIENT
CASE (BOTTOM)-TO-BOARD
RESISTANCE

LTM4625IY#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 20V, 5A Step-Down Module Regulator
Lifecycle:
New from this manufacturer.
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