LTM4625
9
4625fa
For more information www.linear.com/LTM4625
APPLICATIONS INFORMATION
The typical LTM4625 application circuit is shown in
Figure 20. External component selection is primarily
determined by the input voltage, the output voltage and
the maximum load current. Refer to Table 7 for specific
external capacitor requirements for a particular application.
V
IN
to V
OUT
Step-Down Ratios
There are restrictions in the maximum V
IN
and V
OUT
step-
down ratios that can be achieved for a given input voltage
due to the minimum off-time and minimum on-time limits
of the regulator. The minimum off-time limit imposes a
maximum duty cycle which can be calculated as:
D
MAX
= 1 – (t
OFF(MIN)
• f
SW
)
where t
OFF(MIN)
is the minimum off-time, typically 70ns
for LTM4625, and f
SW
(Hz) is the switching frequency.
Conversely the minimum on-time limit imposes a minimum
duty cycle of the converter which can be calculated as:
D
MIN
= t
ON(MIN)
• f
SW
where t
ON(MIN)
is the minimum on-time, typically 40ns
for LTM4625. In the rare cases where the minimum duty
cycle is surpassed, the output voltage will still remain
in regulation, but the switching frequency will decrease
from its programmed value. Note that additional thermal
derating may be applied. See the Thermal Considerations
and Output Current Derating section in this data sheet.
Output Voltage Programming
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 60.4k internal feedback
resistor connects the V
OUT
and FB pins together. Adding a
resistor, R
FB
, from FB pin to SGND programs the output
voltage:
R
FB
=
V
–0.6V
•60.4k
Table 1. R
FB
Resistor Table vs Various Output Voltages
V
OUT
(V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0
R
FB
(kΩ) OPEN 90.9 60.4 40.2 30.1 19.1 13.3 8.25
For parallel operation of N channels, use the following
equation to solve for R
FB
. Tie the V
OUT
, the COMP and FB
pins together for each paralleled output. Connect a single
resistor from FB to GND as determined by:
R
FB
=
V
–0.6V
•
N
See Figure 23 for an example of parallel operation.
Input Decoupling Capacitors
The LTM4625 module should be connected to a low AC
impedance DC source. For the regulator, a 10µF input
ceramic capacitor is required for RMS ripple current de-
coupling. Bulk input capacitance is only needed when the
input source impedance is compromised by long inductive
leads, traces or not enough source capacitance. The bulk
capacitor can be an aluminum electrolytic capacitor or
polymer capacitor.
Without considering the inductor ripple current, the RMS
current of the input capacitor can be estimated as:
I
CIN(RMS)
=
OUT(MAX)
η%
• D• 1–D
(
)
where η% is the estimated efficiency of the power module.
Output Decoupling Capacitors
With an optimized high frequency, high bandwidth design,
only a single low ESR output ceramic capacitor is required
for the LTM4625 to achieve low output ripple voltage and
very good transient response. In extreme cold or hot tem-
perature or high output voltage case, additional ceramic
capacitor or tantalum-polymer capacitor is required due
to variation of actual capacitance over bias voltage and
temperature. Table 7 shows a matrix of different output
voltages and output capacitors to minimize the voltage
droop and overshoot during a 1A or 2A load-step tran-
sient. Additional output filtering may be required by the
system designer if further reduction of output ripple or
dynamic transient spikes is required. The Linear Technol-
ogy LTpowerCAD™ design tool is available to download
online for output ripple, stability and transient response
analysis for further optimization.
