......................DOC #: SP-AP-0052 (Rev. AA) Page 20 of 31
.
.
Table 5. Output Driver Status during PCI-STOP# and CPU-STOP#
PCI_STOP# Asserted CPU_STOP# Asserted SMBus OE Disabled
Single-ended Clocks Stoppable Driven low Running Driven low
Non stoppable Running Running
Differential Clocks Stoppable Clock driven high Clock driven high Clock driven Low or 20K
pulldown
Clock# driven low Clock# driven low
Non stoppable Running Running
Table 6. Output Driver Status
All Single-ended Clocks
All Differential Clocks except
CPU1 CPU1
w/o Strap w/ Strap Clock Clock# Clock Clock#
Latches Open State Low Hi-z Low or 20K pulldown Low Low or 20K pulldown Low
Powerdown Low Hi-z Low or 20K pulldown Low Low or 20K pulldown Low
M1 Low Hi-z Low or 20K pulldown Low Running Running
Figure 12. Clock Generator Power up/Run State Diagram
