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74AHC30PW-Q100J

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
74AHC_AHCT30_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 November 2013 3 of 15
NXP Semiconductors 74AHC30-Q100; 74AHCT30-Q100
8-input NAND gate
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as a
supply pin or input.
Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14
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$+&74
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9
&&
%
QF
&
+
'
*
(
QF
)
QF
*1' <
DDD




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Table 2. Pin description
Symbol Pin Description
A 1 data input
B 2 data input
C 3 data input
D 4 data input
E 5 data input
F 6 data input
GND 7 ground (0 V)
Y 8 data output
n.c. 9 not connected
n.c. 10 not connected
G 11 data input
H 12 data input
n.c. 13 not connected
V
CC
14 supply voltage
74AHC_AHCT30_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 November 2013 4 of 15
NXP Semiconductors 74AHC30-Q100; 74AHCT30-Q100
8-input NAND gate
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 packages: above 70 C the value of P
tot
derates linearly at 8 mW/K.
For TSSOP14 packages: above 60 C the value of P
tot
derates linearly at 5.5 mW/K.
For DHVQFN14 packages: above 60 C the value of P
tot
derates linearly at 4.5 mW/K.
Table 3. Function table
[1]
Input Output
A B C D E F G H Y
LXXXXXXXH
XLXXXXXXH
XXLXXXXXH
XXXLXXXXH
XXXXLXXXH
XXXXXLXXH
XXXXXXLXH
XXXXXXXLH
HHHHHHHHL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7.0 V
V
I
input voltage 0.5 +7.0 V
I
IK
input clamping current V
I
< 0.5 V
[1]
20 - mA
I
OK
output clamping current V
O
<0.5 V or V
O
> V
CC
+ 0.5 V
[1]
20 +20 mA
I
O
output current V
O
=0.5 V to (V
CC
+ 0.5 V) 25 +25 mA
I
CC
supply current - +75 mA
I
GND
ground current 75 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 Cto+125C
[2]
- 500 mW
74AHC_AHCT30_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 November 2013 5 of 15
NXP Semiconductors 74AHC30-Q100; 74AHCT30-Q100
8-input NAND gate
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 74AHC30-Q100 74AHCT30-Q100 Unit
Min Typ Max Min Typ Max
V
CC
supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V
V
I
input voltage 0 - 5.5 0 - 5.5 V
V
O
output voltage 0 - V
CC
0-V
CC
V
T
amb
ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise
and fall rate
V
CC
= 3.3 V 0.3 V - - 100 - - - ns/V
V
CC
= 5.0 V 0.5 V - - 20 - - 20 ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 Cto+85C 40 Cto+125C Unit
Min Typ Max Min Max Min Max
74AHC30-Q100
V
IH
HIGH-level
input voltage
V
CC
=2.0V 1.5 - - 1.5 - 1.5 - V
V
CC
=3.0V 2.1 - - 2.1 - 2.1 - V
V
CC
= 5.5 V 3.85 - - 3.85 - 3.85 - V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V - - 0.5 - 0.5 - 0.5 V
V
CC
= 3.0 V - - 0.9 - 0.9 - 0.9 V
V
CC
= 5.5 V - - 1.65 - 1.65 - 1.65 V
V
OH
HIGH-level
output voltage
V
I
=V
IH
or V
IL
I
O
= 50 A; V
CC
= 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
I
O
= 50 A; V
CC
= 3.0 V 2.9 3.0 - 2.9 - 2.9 - V
I
O
= 50 A; V
CC
= 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 4.0 mA; V
CC
= 3.0 V 2.58 - - 2.48 - 2.40 - V
I
O
= 8.0 mA; V
CC
= 4.5 V 3.94 - - 3.80 - 3.70 - V
V
OL
LOW-level
output voltage
V
I
=V
IH
or V
IL
I
O
=50A; V
CC
= 2.0 V - 0 0.1 - 0.1 - 0.1 V
I
O
=50A; V
CC
= 3.0 V - 0 0.1 - 0.1 - 0.1 V
I
O
=50A; V
CC
= 4.5 V - 0 0.1 - 0.1 - 0.1 V
I
O
=4.0mA; V
CC
= 3.0 V - - 0.36 - 0.44 - 0.55 V
I
O
=8.0mA; V
CC
= 4.5 V - - 0.36 - 0.44 - 0.55 V
I
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
=0Vto5.5V
- - 0.1 - 1.0 - 2.0 A
I
CC
supply current V
I
=V
CC
or GND; I
O
=0A;
V
CC
=5.5V
- - 2.0 - 20 - 40 A
C
I
input
capacitance
V
I
=V
CC
or GND - 3 10 - 10 - 10 pF
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

74AHC30PW-Q100J

Mfr. #:
Buy 74AHC30PW-Q100J
Manufacturer:
Nexperia
Description:
Logic Gates 8-input NAND gate
Lifecycle:
New from this manufacturer.
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