74AHC_AHCT30_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 November 2013 6 of 15
NXP Semiconductors 74AHC30-Q100; 74AHCT30-Q100
8-input NAND gate
10. Dynamic characteristics
C
O
output
capacitance
-4-----pF
74AHCT30-Q100
V
IH
HIGH-level
input voltage
V
CC
= 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
V
IL
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
V
OH
HIGH-level
output voltage
V
I
=V
IH
or V
IL
; V
CC
=4.5V
I
O
= 50 A 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 8.0 mA 3.94 - - 3.80 - 3.70 - V
V
OL
LOW-level
output voltage
V
I
=V
IH
or V
IL
; V
CC
=4.5V
I
O
=50A - 0 0.1 - 0.1 - 0.1 V
I
O
= 8.0 mA - - 0.36 - 0.44 - 0.55 V
I
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
=0Vto5.5V
- - 0.1 - 1.0 - 2.0 A
I
CC
supply current V
I
=V
CC
or GND; I
O
=0A;
V
CC
=5.5V
- - 2.0 - 20 - 40 A
I
CC
additional
supply current
per input pin;
V
I
=V
CC
2.1 V; other pins
at V
CC
or GND; I
O
=0A;
V
CC
= 4.5 V to 5.5 V
- - 1.35 - 1.5 - 1.5 mA
C
I
input
capacitance
V
I
=V
CC
or GND - 3 10 - 10 - 10 pF
C
O
output
capacitance
-4-----pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 Cto+85C 40 Cto+125C Unit
Min Typ Max Min Max Min Max
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 7
.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max
74AHC30-Q100
t
pd
propagation
delay
A, B, C, D, E, F, G, H to
Y; see Figure 6 and 7
[2]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 5.0 9.5 1.0 11.0 1.0 12.0 ns
C
L
= 50 pF - 6.7 12.0 1.0 14.5 1.0 15.5 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 3.6 6.5 1.0 7.5 1.0 8.0 ns
C
L
= 50 pF - 4.9 8.0 1.0 9.5 1.0 10.5 ns