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NCV7708BDWR2G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
NCV7708B
http://onsemi.com
7
ELECTRICAL CHARACTERISTICS
(−40°C < T
J
< 150°C, 5.5 V < VSx < 40 V, EN = V
CC
= 5 V, unless otherwise specified)
Characteristic
Conditions
Timing
Chart #
Min Typ Max Unit
Serial Peripheral Interface (V
CC
= 5 V)
SCLK Frequency
− − 5.0 MHz
SCLK Clock Period V
CC
= 5 V
V
CC
= 3.3 V
200
500
−
−
−
−
ns
Maximum Input Capacitance (Note 8) SI, SCLK − − − 12 pF
SCLK High Time 1 85 − − ns
SCLK Low Time 2 85 − − ns
SCLK Setup Time 3
4
85
85
−
−
−
−
ns
SI Setup Time 11 50 − − ns
SI Hold Time 12 50 − − ns
CSB Setup Time 5
6
100
100
−
−
−
−
ns
CSB High Time (Note 9) 7 200 − − ns
SO enable after CSB falling edge 8 − − 50 ns
SO disable after CSB rising edge 9 − − 50 ns
SO Rise Time C
load
= 40 pF − − 10 25 ns
SO Fall Time C
load
= 40 pF − − 10 25 ns
SO Valid Time SCLK ↑ to SO 50% 10 − 20 50 ns
8. Not tested in production
9. This is the minimum time the user must wait between SPI commands.
NCV7708B
http://onsemi.com
8
Figure 2. SPI Timing Diagram
CSB
SO
89
SI
SO
SCLK
12
11
10
CSB
SCLK
3 1 2
5
4 7
6
SPI Communication
Standard 16−bit communication has been implemented
for the communication of this IC to turn drivers on and off,
and to report faults. (Reference the SPI Communication
Frame Format Diagram). The LSB (Least Significant Bit) is
clocked in first.
Communication is implemented as follows:
1. CSB goes low to allow serial data transfer.
2. A 16 bit word is clocked (SCLK) into the SI
(serial input) pin. The SI input signal is latched on
the falling edge of SCLK.
3. CSB goes high to transfer the clocked in
information to the data registers.
(Note: SO is tristate when CSB is high.)
4. The SI data will be accepted when a valid SPI
frame is detected. A valid SPI frame consists of
the above conditions and a complete set of
multiples of 16 bit words.
NCV7708B
http://onsemi.com
9
Figure 3. SPI Communication Frame Format
CSB
SI
SCLK
SO
OUTH4 OUTL5 OUTH5 OUTL6 OUTH6 OCD ULD OVLOOUTH2 OUTL3 OUTH3 OUTL4SRR OUTL1 OUTH1 OUTL2
OUTH4 OUTL5 OUTH5 OUTL6 OUTH6 OLD ULD PSFOUTH2 OUTL3 OUTH3 OUTL4OUTL1 OUTH1 OUTL2TW
The table below defines the programming bits and
diagnostic bits. Fault information is sequentially clocked out
the SO pin of the NCV7708B as programming information
is clocked into the SI pin of the device. Daisy chain
communication between SPI compatible IC’s is possible by
connection of the serial output pin (SO) to the input of the
sequential IC (SI).
Input Data
Bit
Number
Bit Description Bit Status
15 Over Voltage Lock Out
Control (OVLO)
0 = Disable
1 = Enable
14 Under Load Detection Shut
Down Control (ULD)
0 = Disable
1 = Enable
13 Over Current Detection Shut
Down Control (OCD)
0 = Disable
1 = Enable
12 OUTH6
0 = Off
1 = On
11 OUTL6
0 = Off
1 = On
10 OUTH5
0 = Off
1 = On
9 OUTL5
0 = Off
1 = On
8 OUTH4
0 = Off
1 = On
7 OUTL4
0 = Off
1 = On
6 OUTH3
0 = Off
1 = On
5 OUTL3
0 = Off
1 = On
4 OUTH2
0 = Off
1 = On
3 OUTL2
0 = Off
1 = On
2 OUTH1
0 = Off
1 = On
1 OUTL1
0 = Off
1 = On
0 Status Register Reset (SRR)
0 = No Reset
1 = Reset
Output Data
Bit
Number
Bit Description Bit Status
15 Power Supply Fail Signal
(OVLO or UVLO = PSF)
0 = No Fault
1 = Fault
14 Under Load Detect Signal
(ULD)
0 = No Fault
1 = Fault
13 Over Load Detect Signal
(OLD)
0 = No Fault
1 = Fault
12 OUTH6*
0 = Off
1 = On
11 OUTL6*
0 = Off
1 = On
10 OUTH5*
0 = Off
1 = On
9 OUTL5*
0 = Off
1 = On
8 OUTH4*
0 = Off
1 = On
7 OUTL4*
0 = Off
1 = On
6 OUTH3*
0 = Off
1 = On
5 OUTL3*
0 = Off
1 = On
4 OUTH2*
0 = Off
1 = On
3 OUTL2*
0 = Off
1 = On
2 OUTH1*
0 = Off
1 = On
1 OUTL1*
0 = Off
1 = On
0 Thermal Warning (TW)
0 = Not in TW
1 = In TW
*Output Bits [1:12] represent the state of the designated outputs.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

NCV7708BDWR2G

Mfr. #:
Buy NCV7708BDWR2G
Manufacturer:
ON Semiconductor
Description:
Motor / Motion / Ignition Controllers & Drivers HALF BRIDGE DRIVER
Lifecycle:
New from this manufacturer.
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