LX1675
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 10
Copyright © 2004
Rev. 1.2a, 2006-02-16
WWW.Microsemi .COM
Multiple Output LoadSHARE™ PWM
TM
®
THEORY OF OPERATION (CONTINUED)
B
I-PHASE, LOADSHARE (ESR METHOD)
The first method is to change the ratio of the inductors
equivalent series resistance, (ESR). As can be seen in the
previous example, if the offset error is zero and the ESR of the
two inductors are identical, then the two inductor currents will be
identical. To change the ratio of current between the two
inductors, the value of the inductor’s ESR can be changed to
allow more current to flow through one inductor than the other.
The inductor with the lower ESR value will have the larger
current. The inductor currents are directly proportional to the
ratio of the inductor’s ESR value.
The following circuit description shows how to select the
inductor ESR for each phase where a different amount of power
is taken from two different input power supplies. A typical setup
will have a +5V power supply connected to the phase 1 half
bridge driver and a +3.3V power supply connected to the phase 2
half bridge driver. The combined power output for this core
voltage is 18W (+1.5V @ 12A). For this example the +5V power
supply will supply 7W and the +3.3V power supply will supply
the other 11W. 7W @ 1.5V is a 4.67A current through the phase
1 inductor. 11W @ 1.5V is a 7.33A current through the phase 2
inductor. The ratio of inductor ESR is inversely proportional to
the power level split.
1I
2I
2ESR
1ESR
=
The higher current inductor will have the lower ESR value. If
the ESR of the phase 1 inductor is selected as 10mΩ, then the
ESR value of the phase 2 inductor is calculated as:
m4.6m10
A33.7
A67.4
=×
Depending on the required accuracy of this power sharing;
inductors can be chosen from standard vendor tables with an ESR
ratio close to the required values. Inductors can also be designed
for a given application so that there is the least amount of
compromise in the inductor’s performance.
1.5V @ 12A
18W
6.4mΩ
4.67A
7.33A
10mΩ
1.5V +
46.7mV
L1
L2
+5V @ 7W
+3.3V @ 11W
Figure 7 –LoadSHARE Using Inductor ESR
BI-PHASE, LOADSHARE (FEEDBACK DIVIDER METHOD)
Sometimes it is desirable to use the same inductor in both phases
while having a much larger current in one phase versus the other.
A simple resistor divider can be used on the input side of the Low
Pass Filter that is taken off of the switching side of the inductors. If
the Phase 2 current is to be larger than the current in Phase 1; the
resistor divider is placed in the feedback path before the Low Pass
Filter that is connected to the Phase 2 inductor. If the Phase 2
current needs to be less than the current in Phase 1; the resistor
divider is then placed in the feedback path before the Low Pass
Filter that is connected to the Phase 1 inductor.
As in Figure 7, the millivolts of DC offset created by the resistor
divider network in the feedback path, appears as a voltage
generator between the ESR of the two inductors.
A divider in the feedback path from Phase 2 will cause the
voltage generator to be positive at Phase 2. With a divider in the
feedback path of Phase 1 the voltage generator becomes positive at
Phase 1. The Phase with the positive side of the voltage generator
will have the larger current. Systems that operate continuously
above a 30% power level can use this method.
A down side is that the current difference between the two
inductors still flows during a no load condition. This produces a
low efficiency condition during a no load or light load
state, this
method should not be used if a wide range of output power is
required.
The following description and Figure 8 show how to determine
the value of the resistor divider network required to generate the
offset voltage necessary to produce the different current ratio in the
two output inductors. The power sharing ratio is the same as that
of Figure 7. The Offset Voltage Generator is symbolic for the DC
voltage offset between Phase 1 & 2. This voltage is generated by
small changes in the duty cycle of Phase 2. The output of the LPF
is a DC voltage proportional to the duty cycle on its input. A small
amount of attenuation by a resistor divider before the LPF of Phase
2 will cause the duty cycle of Phase 2 to increase to produce the
added offset at V2. The high DC gain of the error amplifier will
force LPF2 to always be equal to LPF1. The following calculations
determine the value of the resistor divider necessary to satisfy this
example.
A
A
P
P
P
P
L
L
I
I
C
C
A
A
T
T
I
I
O
O
N
N
S
S
LX1675
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 11
Copyright © 2004
Rev. 1.2a, 2006-02-16
WWW.Microsemi .COM
Multiple Output LoadSHARE™ PWM
TM
®
THEORY OF OPERATION (CONTINUED)
L1,
Switch
Side
L2,
Switch
Side
100
Not
Used
62k
4700pF
+
-
62k
4700pF
62k
TBD
100
Offset
Voltage
Generator
-
+
ESR L1
10mΩ
ESR L2
10mΩ
V
o
u
1.5V @ 12
A
18
W
Resistor
Divider
Resistor
Divider
Phase 2
Error Amp
Phase 1
Phase 2
V1
V2
1.5V
+73.3mV
1.5V
+46.7mV
7.33A
4.67A
+5V @ 7W
+3.3V @ 11W
LPF1
LPF2
FB2
RF2
PWM
Input
Figure 8 – LoadSHARE Using Feedback Divider Offset
Where V1 = 1.5467 ; V2 = 1.5733 and
2V
1V
K =
then K 5.814
K1
100 K
TBD =
×
=
A
A
P
P
P
P
L
L
I
I
C
C
A
A
T
T
I
I
O
O
N
N
S
S
LX1675
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 12
Copyright © 2004
Rev. 1.2a, 2006-02-16
WWW.Microsemi .COM
Multiple Output LoadSHARE™ PWM
TM
®
THEORY OF OPERATION (CONTINUED)
BI-PHASE, LOADSHARE (PROPORTIONAL METHOD)
The best topology for generating a current ratio at full load
and proportional between full load and no load is shown in figure
9. The DC voltage difference between LPF1 and VOUT is a
voltage that is proportional to the current flowing in the Phase 1
inductor. This voltage can be amplified and used to offset the
voltage at LPF2 through a large impedance that will not
significantly alter the characteristics of the low pass filter. At no
load there will be no offset voltage and no offset current between
the two phases. This will give the highest efficiency at no load.
Also a speed up capacitor can be used between the offset
amplifier output and the negative input of the Phase 2 error
amplifier. This will improve the transient response of the Phase 2
output current, so that it will share more equally with phase 1
current during a transient condition.
The use of a MOSFET input amplifier is required for the buffer
to prevent loading the low pass filter. The gain of the offset
amplifier, and the value of Ra and Rb, will determine the ratio of
currents between the phases at full load. Two external amplifiers
are required or this method.
L1,
Switch
Side
L2,
Switch
Side
62k
+
-
62k
4700pF
62k
Offset
Voltage
Generator
-
+
ESR L1
10mΩ
ESR L2
10mΩ
V
o
u
1.5V @ 12
A
18
W
Phase 2
Error Amp
Phase 1
Phase 2
V1
V2
1.5V
+73.3mV
1.5V
+46.7mV
7.33A
4.67A
+5V @ 7W
+3.3V @ 11W
LPF2
+
-
+
-
1M
4700pF
LPF1
Offset Amp
Vos
Rf
Rin
Ra
Rb
RF2
FB2
PWM
Input
Figure 9 – LoadSHARE Using Proportional Control
A
A
P
P
P
P
L
L
I
I
C
C
A
A
T
T
I
I
O
O
N
N
S
S

LX1675CLQ

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Switching Controllers PWM Controllers
Lifecycle:
New from this manufacturer.
Delivery:
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