LTC4316CMS#TRPBF Datasheet LTC4316IMS#PBF, LTC4316CMS#PBF, LTC4316CDD#PBF | P7-P9

LTC4316

4316fa

For more information www.linear.com/LTC4316

OPERATION

SDAOUT pin. Once all 7 bits of the address are processed,

the LTC4316 turns on N2 again to reconnect SDAIN to

SDAOUT. The master then transmits the R/W bit directly

to the slave. If the new, translated address on SDAOUT

matches the slave’s address, the slave pulls SDAOUT low

to acknowledge (ACK bit). N2 remains on and the rest of

the data bytes are transmitted unmodified between the

master and slave. The address translation process restarts

when the master issues a new START bit.

Figure 2 shows typical waveforms for the circuit on the

front page. In this example, the master transmits address

0x34 while the slave is configured to respond to address

0x36. The resistive dividers at the XORL and XORH pins are

configured to generate an address translation byte of 0x02.

Note that in this example, the 8-bit hexadecimal address

format (with R/W=0) is used. 7-bit addresses are also

commonly found in I

C device documentation. Make sure

to use the correct format when calculating the address

translation byte. Table 1 shows examples of both formats.

Figure 1. Basic Functions of the LTC4316

4316 F01

CC1

MASTER

SCLOUT

SDAOUT

SCLIN

SDAIN

CC2

SLAVE

LTC4316

SLAVE

7-BIT ADDRESS TRANSLATION

BYTE SHIFT REGISTER

0000010

ENABLE

ADDRESS

TRANSLATION

1.8V

CMP2

–

XOR

Figure 1 shows an I

C master connected to the input bus

of the LTC4316 (SCLIN and SDAIN). The slave devices

requiring address translation are connected to the output

bus of the LTC4316 (SCLOUT and SDAOUT). Any other

slave devices that do not require address translation are

placed together with the master on the input bus of the

LTC4316. Tw o switches (N1 and N2) inside the LTC4316

connect the input bus to the output bus. N1 connects

SCLIN to SCLOUT while N2 connects SDAIN to SDAOUT.

In most conditions, N1 and N2 stay on so that the input

and output buses are connected.

Translation starts when the master issues a START bit

(SDAIN goes low while SCLIN is high). The LTC4316

turns off N2 to disconnect SDAIN from SDAOUT. As the

master sends the address byte, the LTC4316 translates

the incoming address at the SDAIN pin to a new address

at the SDAOUT pin by XORing each incoming bit with

a user-configurable translation byte, one bit at a time.

N3 turns on and off to send out the new address to the

Figure 2. Basic Address Translation Waveforms

TRANSLATION

BYTE

SDAOUT

SCLIN

SDAIN

ADDRESS BITSSTART

a6 a5 a4 a3 a2 a1 a0

0 1 1 0 1 0 0

0 0 0 0 0 1 0

0 1 1 0 1 1 0

= 0x34

= 0x02

= 0x36

4316 F02

N2 GATE N2 ON N2 ON N2 OFF

R/W

BIT

ACK

BIT

LTC4316

4316fa

For more information www.linear.com/LTC4316

OPERATION

Figure 4. Tw o Slaves Sharing One LTC4316Figure 3. Tw o Independent Address Translation

Setting the Translation Byte

When the LTC4316 is first powered up or any time a rising

edge is detected on the ENABLE pin, the LTC4316 reads

the voltages at XORH and XORL pins to determine the

7-bit translation byte. These voltages are referenced to

so a resistive divider at each of these pins is the most

convenient way to set the voltages. The required transla-

tion byte

can be determined by taking the bitwise XOR of

the

slave’s original address and the desired input address.

The voltages at the XORH and XORL pins configure the

translation byte. The XORL voltage configures the lower

4 translation bits (excluding the R/W bit), while the XORH

voltage configures the upper 3 translation bits. Tables 2

and 3 show the recommended resistive divider values. R

and R

are the top and bottom resistors connected to

XORL, while R

and R

are the top and bottom resistors

connected to XORH (Figure 5). Use 1% tolerance resistors

for R

, R

and R

SCL

SDA

4316 F03

MASTER

SCLOUT

SDAOUT

SCLIN

SDAIN

SLAVE #1

INPUT ADDRESS 0x32

TRANSLATION BYTE 0x06

SCL

SDA

SLAVE

HARDWIRED ADDRESS

0x34

LTC4316

SCLOUT

SDAOUT

SCLIN

SDAIN

SLAVE #3

INPUT ADDRESS 0x36

TRANSLATION BYTE 0x02

SCL

SDA

SLAVE

HARDWIRED ADDRESS

0x34

LTC4316

SCL

SDA

SLAVE

HARDWIRED ADDRESS

0x34

00110010

00000110

00110100

00110110

00000010

00110100

SCL

SDA

4316 F04

MASTER

SCL

SDA

SLAVE

HARDWIRED ADDRESS

0x34

SCLOUT

SDAOUT

SCLIN

SDAIN

TRANSLATION BYTE

0x02

SLAVE #1

INPUT ADDRESS

0x36

SLAVE #3

INPUT ADDRESS

0x32

SCL

SDA

SLAVE

HARDWIRED ADDRESS

0x34

LTC4316

SCL

SDA

SLAVE

HARDWIRED ADDRESS

0x30

00110110

00000010

00110100

00110010

00000010

00110000

System Configurations

There are several ways that individual slaves or banks of

slaves can be connected to an LTC4316. In Figure 3, each

slave is paired with an LTC4316. This configuration allows

for maximum flexibility in allocating the bus addresses.

Both read and write operations and all protocols supported

by the LTC4316 are allowed. Figure 4 shows two slaves

with different hardwired addresses translated to two dif

ferent addresses

using a single LTC4316 and a common

translation byte. A program is available to help the user

visualize an I

C bus with the LTC4316; this program can

be found in the following link:

www.linear.com/TranslatorTool

Table 1.

DESCRIPTION BINARY ADDRESS 7-BIT HEX ADDRESS

WITHOUT R/W

8-BIT HEX ADDRESS

WITH R/W=0

a6 a5 a4 a3 a2 a1 a0 R/W

Input Address from SDAIN 0 0 1 1 0 1 0 0 0x1A 0x34

Translation Byte 0 0 0 0 0 0 1 0 0x01 0x02

Output Address to SDAOUT 0 0 1 1 0 1 1 0 0x1B 0x36

LTC4316

4316fa

For more information www.linear.com/LTC4316

OPERATION

For example, if R

= 976k, R

= 102k, R

= 1000k, and

= 280k, the lower 4 translation bits are 0001b and

the upper 3 bits are 011b. The 8-bit hexadecimal address

translation byte is obtained by adding a 0 as the LSB, which

gives 0110 0010b or 0x62. If the configuration voltages

at XORL and XORH pins are the same, they can be tied

together and connected to a single resistive divider. Alter

First choose a total resistance value R

TOTAL

= R

TOTAL

• (V

XORH

)

= (R

TOTAL

• V

XORL

) – R

= R

TOTAL

– R

Use 1% tolerance resistors for R

, R

and R

Once the XORL and XORH pins are read, the LTC4316

turns on switches N1 and N2, connecting the input and

output, and the READY pin goes high to indicate that the

LTC4316 is ready to start address translation.

The address translation byte can be changed during

operation by changing the XORH and XORL voltages and

toggling the ENABLE pin (high-low-high). This triggers

the LTC4316 to re-read the XORL and XORH voltages.

Enable/UVLO

If the ENABLE pin is driven below V

ENABLE(TH)

or if V

is below the UVLO threshold, the LTC4316 shuts down.

The internal shift register storing the address translation

byte is cleared, address translation is disabled, switches

Table 2. Setting the Resistive Divider at XORL

LOWER

4-BIT OF

TRANSLATION

BYTE

XORL

RECOMMENDED

[kΩ]

RECOMMENDED

[kΩ]

a3 a2 a1 a0

0 0 0 0 ≤ 0.03125 Open Short

0 0 0 1 0.09375 ±0.015 976 102

0 0 1 0 0.15625 ±0.015 976 182

0 0 1 1 0.21875 ±0.015 1000 280

0 1 0 0 0.28125 ±0.015 1000 392

0 1 0 1 0.34375 ±0.015 1000 523

0 1 1 0 0.40625 ±0.015 1000 681

0 1 1 1 0.46875 ±0.015 1000 887

1 0 0 0 0.53125 ±0.015 887 1000

1 0 0 1 0.59375 ±0.015 681 1000

1 0 1 0 0.65625 ±0.015 523 1000

1 0 1 1 0.71875 ±0.015 392 1000

1 1 0 0 0.78125 ±0.015 280 1000

1 1 0 1 0.84375 ±0.015 182 976

1 1 1 0 0.90625 ±0.015 102 976

1 1 1 1 ≥ 0.96875 Short Open

Table 3. Setting the Resistive Divider at XORH

UPPER

3-BIT OF

TRANSLATION

BYTE

XORH

RECOMMENDED

[kΩ]

RECOMMENDED

[kΩ]

a6 a5 a4

0 0 0 ≤ 0.03125 Open Short

0 0 1 0.09375 ±0.015 976 102

0 1 0 0.15625 ±0.015 976 182

0 1 1 0.21875 ±0.015 1000 280

1 0 0 0.28125 ±0.015 1000 392

1 0 1 0.34375 ±0.015 1000 523

1 1 0 0.40625 ±0.015 1000 681

1 1 1 0.46875 ±0.015 1000 887

Figure 5. Address Translation Byte Configuration Resistors

Figure 6. Address Translation Byte Configuration Using

Three Resistors

4316 F05

XORLXORH

LTC4316

4316 F06

XORH

LTC4316

XORL

natively, three resistors can be used to configure the XORL

and XORH pins (Figure 6). Use the following procedure

to calculate the value of the three resistors:

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

LTC4316CMS#TRPBF

Mfr. #:

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Manufacturer:

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Description:

Interface - Specialized 1x I2C/SMBus Address Translator

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LTC4316CMS#TRPBF

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