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MAX6717AUKRVD6+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
MAX6715A–MAX6729A/MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 µP
Supervisory Circuits
_______________________________________________________________________________________ 7
Pin Description (continued)
PIN
MAX6715A/
MAX6716A
MAX6717A/
MAX6718A
MAX6719A
/
MAX6720A
MAX6721A/
MAX6722A
MAX6723A
/
MAX6724A
MAX6725A/
MAX6726A
MAX6727A
M AX6 7 2 8A/
M AX6 7 2 9A/
M AX6 7 9 7A
NAME FUNCTION
5 —— — ————RST2
Active-Low Reset Output,
Open-Drain or Push-Pull.
RST2 changes from high
to low when V
CC
1 or V
CC
2
drops below the selected
reset thresholds or MR is
pulled low. RST2 remains
low for the reset timeout
period after V
CC
1/V
CC
2
exceed the device reset
thresholds or MR goes low
to high. Open-drain
outputs r eq ui r e an exter nal
p ul l up r esi stor . P ush- p ul l
outp uts are referenced to
V
CC
2.
2 2 2 2 2 2 2 2 GND Ground
3333—555MR
Active-Low Manual-Reset
Input. Internal 50kΩ pullup
to V
CC
1. Pull low
to force a reset. Reset
remains active as long as
MR is low and for the reset
timeout period after MR
goes high. Leave
unconnected or connect
to V
CC
1 if unused.
4 44 4 4666V
CC
2
Secondary Supply Voltage
Input. Powers
the device when it is
above V
CC
1 and input
for secondary reset
threshold monitor.
6 56 6 6888V
CC
1
Primary Supply Voltage
Input. Powers the device
when it is above V
CC
2
and input for primary reset
threshold monitor.
MAX6715A–MAX6729A/MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 µP
Supervisory Circuits
8 _______________________________________________________________________________________
Pin Description (continued)
PI N
M AX6 7 1 5A/
M AX6 7 1 6A
M AX6 7 1 7A/
M AX6 7 1 8A
M AX6 7 1 9A/
M AX6 7 2 0A
M AX6 7 2 1A/
M AX6 7 2 2A
M AX6 7 2 3A/
M AX6 7 2 4A
M AX6 7 2 5A/
M AX6 7 2 6A
M AX6 7 2 7A
M AX6 7 2 8A/
M AX6 7 2 9A/
M AX6 7 9 7A
NAME FUNCTION
———5 3333WDI
Watchdog Input. If WDI
remains high or low for
longer than the watchdog
timeout period, the internal
watchdog timer runs out
and the reset output
asserts for the reset
timeout period. The
internal watchdog timer
clears whenever a reset is
asserted or WDI sees a
rising or falling edge. The
watchdog has a long
startup period (35s min)
after each reset event and
a short watchdog timeout
period (1.12s min) after
the first valid WDI
transition. Leave WDI
unconnected to disable
the watchdog timer. The
WDI unconnected-state
detector uses a small
200nA current source.
Therefore, do not connect
WDI to anything that will
source more than 50nA.
— — 5 — 5 7 7 — RSTIN
Undervoltage Reset
Comparator Input. High-
impedance input for
adjustable reset monitor.
The reset output is
asserted when RSTIN falls
below the 0.626V internal
reference voltage. Set the
monitored voltage reset
threshold with an external
resistor-divider network.
Connect RSTIN to V
CC
1
or V
CC
2 if not used.
MAX6715A–MAX6729A/MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 µP
Supervisory Circuits
_______________________________________________________________________________________ 9
Pin Description (continued)
PIN
M A X6 7 1 5A /
M A X6 7 1 6A
M A X6 7 1 7A
/
M A X6 7 1 8A
M A X6 7 1 9A
/
M A X6 7 2 0A
M A X6 7 2 1A /
M A X6 7 2 2A
M A X6 7 2 3A
/
M A X6 7 2 4A
M A X6 7 2 5A
/
M A X6 7 2 6A
M A X6 7 2 7A
M AX6 7 2 8A/
M AX6 7 2 9A/
M AX6 7 9 7A
NAME FUNCTION
— ——————7PFI
Power-Fail Voltage
Monitor Input. High-
impedance input for
internal power-fail monitor
comparator. Connect PFI
to an external resistor-
divider network to set the
power-fail threshold
voltage (0.626V typical
internal reference
voltage). Connect to GND,
V
CC
1, or V
CC
2 if not used.
— ——————4PFO
Active-Low Power-Fail
Monitor Output, Open-
Drain or Push-Pull. PFO is
asserted low when PFI is
less than 0.626V. PFO
deasserts without a reset
timeout period. Open-
drain outputs require an
external pullup resistor.
Push-pull outputs are
referenced to V
CC
1.
— — — — — 4 — — RST
Active-High Reset Output,
Open-Drain or Push-Pull.
RST changes from low to
high when V
CC
1 or V
CC
2
drops below selected
reset thresholds, RSTIN is
below threshold, MR is
pulled low, or the
watchdog triggers a reset.
RST remains HIGH for the
reset timeout period after
V
CC
1/V
CC
2/RSTIN exceed
the device reset
thresholds, MR goes low
to high, or the watchdog
triggers a reset. Open-
drain outputs require an
external pullup resistor.
Push-pull outputs are
referenced to V
CC
1.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

MAX6717AUKRVD6+T

Mfr. #:
Buy MAX6717AUKRVD6+T
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits Dual uPower Superviso
Lifecycle:
New from this manufacturer.
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