R7731A
9
R7731A-10 August 2011
www.richtek.com
Application Information
UVLO
Under Voltage LockOut (UVLO) block is to ensure V
DD
has reached proper operation voltage before we enable
the whole IC blocks. To provide better temperature
coefficient and precise UVLO threshold voltage, the
reference voltage of hysteresis voltage (10V / 14V) is from
band-gap block directly. By this way, R7731A can operate
more reliable in different environments.
The maximum start-up current (30μA) is only for leakage
current of IC at UVLO(on)-0.1V. The external al-capacitor
on VDD may have 5 to 6μA extra leakage current. So
designed start-up current of the system should exceed
36μA or more and IC can start up normally. In addition,
designed start-up current of system should be less than
380μA, and IC can work normally at hiccup mode.
Jittering Oscillator
For better EMI performance, R7731A will operate the
system with ±6% frequency deviation around setting
frequency.
To guarantee precise frequency, it is trimmed to 5%
tolerance. It also generates slope compensation saw-tooth,
75% maximum duty cycle pulse and overload protection
slope. By adjusting resistor of RT pin according to the
following formula :
Figure 1. Competitor
V
CS
V
OUT
V
CS
(500mV/Div)
V
OUT
(2V/Div)
)(kR
6500
(kHz)f
T
OSC
Ω
=
It can typically operate between 50kHz to 130kHz. Note
that RT pin can't be short or open otherwise oscillator will
not operate.
Built-in Slope Compensation
To reduce component counts, slope compensation is
implemented by internal built-in saw-tooth. Since it's built-
in, it's compromised between loop gain and sub-harmonic
reduction. In general design, it can cancel sub-harmonic
to 90Vac.
Leading Edge Blanking (LEB)
MOSFET C
OSS
, secondary rectifier reverse recovery
current and gate driver sourcing current comprise initial
current spike. The spike will seriously disturb current mode
operation especially at light load and high line. R7731A
provides built-in 420ns LEB to guarantee proper operation
in diverse design.
Noise Immunity
Current mode controller is very sensitive to noise. R7731A
takes the advantages of Richtek long term experience in
designing high noise immunity current mode circuit and
layout. Also, we amplify current sense signal to compare
with feedback signal instead of dividing feedback signal.
All the effort is to provide clean and reliable current mode
operation.
Soft-Start
During initial power on, especially at high line, current
spike is kind of unlimited by current limit. Therefore,
besides cycle-by-cycle current limiting, R7731A still
provides soft-start function. It effectively suppresses the
start-up current spike. As shown in the Figure 1 and
Figure 2, the start-up V
CS
is about 0.3V lower than
competitor. The typical soft-start duration is 4ms (R
T
=
100kΩ). Again, this will provide more reliable operation
and possibility to use smaller current rating power
MOSFET.
